AspeedCoprocessorState *soc;
AspeedCoprocessorClass *sc;
Ast2700FCState *s = AST2700A1FC(machine);
+ AspeedSoCState *psp = ASPEED_SOC(&s->ca35);
+
s->tsp_sysclk = clock_new(OBJECT(s), "TSP_SYSCLK");
clock_set_hz(s->tsp_sysclk, 200000000ULL);
sc = ASPEED_COPROCESSOR_GET_CLASS(soc);
aspeed_soc_uart_set_chr(soc->uart, ASPEED_DEV_UART7, sc->uarts_base,
sc->uarts_num, serial_hd(2));
+ object_property_set_link(OBJECT(&s->tsp), "sram",
+ OBJECT(&psp->sram), &error_abort);
if (!qdev_realize(DEVICE(&s->tsp), NULL, errp)) {
return false;
}
static const hwaddr aspeed_soc_ast27x0tsp_memmap[] = {
[ASPEED_DEV_SDRAM] = 0x00000000,
+ [ASPEED_DEV_SRAM] = 0x70000000,
[ASPEED_DEV_INTC] = 0x72100000,
[ASPEED_DEV_SCU] = 0x72C02000,
[ASPEED_DEV_SCUIO] = 0x74C02000,
sc->memmap[ASPEED_DEV_SDRAM],
&s->sdram);
+ /* SRAM */
+ memory_region_init_alias(&s->sram_alias, OBJECT(s), "sram.alias",
+ s->sram, 0, memory_region_size(s->sram));
+ memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SRAM],
+ &s->sram_alias);
+
/* SCU */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
return;