]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/xe: Label RING_CONTEXT_CONTROL as masked
authorAshutosh Dixit <ashutosh.dixit@intel.com>
Thu, 4 Apr 2024 16:12:56 +0000 (09:12 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 17 May 2024 10:14:47 +0000 (12:14 +0200)
[ Upstream commit f76646c83f028c62853c23dac49204232e903597 ]

RING_CONTEXT_CONTROL is a masked register.

v2: Also clean up setting register value (Lucas)

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240404161256.3852502-1-ashutosh.dixit@intel.com
(cherry picked from commit dc30c6e7149baaae4288c742de95212b31f07438)
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/xe/regs/xe_engine_regs.h
drivers/gpu/drm/xe/xe_lrc.c

index 5592774fc69036da5bc211bab2eb8c4cd3d60063..81b8362e934069b6353adea9daa3ab0535d49d64 100644 (file)
 #define RING_EXECLIST_STATUS_LO(base)          XE_REG((base) + 0x234)
 #define RING_EXECLIST_STATUS_HI(base)          XE_REG((base) + 0x234 + 4)
 
-#define RING_CONTEXT_CONTROL(base)             XE_REG((base) + 0x244)
+#define RING_CONTEXT_CONTROL(base)             XE_REG((base) + 0x244, XE_REG_OPTION_MASKED)
 #define          CTX_CTRL_INHIBIT_SYN_CTX_SWITCH       REG_BIT(3)
 #define          CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT   REG_BIT(0)
 
index 0aa4bcfb90d9d0a4a9f317d115eb206f8ccc6f86..72f04a656e8b1edc811da5973bdb05d96f7b4203 100644 (file)
@@ -523,9 +523,8 @@ static const u8 *reg_offsets(struct xe_device *xe, enum xe_engine_class class)
 
 static void set_context_control(u32 *regs, struct xe_hw_engine *hwe)
 {
-       regs[CTX_CONTEXT_CONTROL] = _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH) |
-                                   _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) |
-                                   CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT;
+       regs[CTX_CONTEXT_CONTROL] = _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
+                                                      CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
 
        /* TODO: Timestamp */
 }