Enable ARMV8_UNROLL12_EOR3 optimization for Neoverse N2/N3

Unlike Neoverse N1, the Neoverse N2 and Neoverse N3 cores support the
EOR3 instruction. Enabling ARMV8_UNROLL12_EOR3 on these cores gives
performance uplift of 9-10% for AES-CTR 128/192/256 ciphers at larger
block sizes.

Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/29044)

diff --git a/crypto/armcap.c b/crypto/armcap.c
index 9831162244af7dbaa4121af1d1ffba74d17f83fd..afbfb377dd8d46fc1c547bf18e7a0dbe1bccd6cd 100644 (file)
--- a/crypto/armcap.c
+++ b/crypto/armcap.c
@@ -429,6 +429,8 @@ void OPENSSL_cpuid_setup(void)
          MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V2) ||
          MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V3_AE) ||
          MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V3) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N2) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N3) ||
          MIDR_IMPLEMENTER(OPENSSL_arm_midr) == ARM_CPU_IMP_AMPERE) &&
         (OPENSSL_armcap_P & ARMV8_SHA3))
         OPENSSL_armcap_P |= ARMV8_UNROLL12_EOR3;