re PR rtl-optimization/16356 (Failure to use count register (branch on count register))

	PR rtl-optimization/16356
	* config/rs6000/rs6000.md (floatdisf2_internal2): Rewrite with
	separate output register and one less jump.  Enable for powerpc64.
	(floatdisf2): Adjust for above.

From-SVN: r91325

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 61ef37f014d217dde12ae70a91a6b0099474e9cf..883c1b197d08850942ee84cce406d97e208e0ce5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2004-11-26  Alan Modra  <amodra@bigpond.net.au>
+
+       PR rtl-optimization/16356
+       * config/rs6000/rs6000.md (floatdisf2_internal2): Rewrite with
+       separate output register and one less jump.  Enable for powerpc64.
+       (floatdisf2): Adjust for above.
+
 2004-11-25  Ralf Corsepius <ralf.corsepius@rtems.org>
 
        * config.gcc (avr-*-rtems*): Fix typo.
@@ -13,7 +20,7 @@
 
        Backport from mainline:
        2004-10-18  Eric Botcazou  <ebotcazou@libertysurf.fr>
-                    Roger Sayle  <roger@eyesopen.com>
+                   Roger Sayle  <roger@eyesopen.com>
 
        PR middle-end/17813
        * dojump.c (discard_pending_stack_adjust): New function.
@@ -864,10 +871,10 @@
        2004-03-20  Ziemowit Laski  <zlaski@apple.com>
        2004-03-24  Ziemowit Laski  <zlaski@apple.com>
        2004-05-11  Fariborz Jahanian <fjahanian@apple.com>
-       2004-07-23  Janis Johnson  <janis187@us.ibm.com>
-       2004-08-12  Janis Johnson  <janis187@us.ibm.com>
+       2004-07-23  Janis Johnson  <janis187@us.ibm.com>
+       2004-08-12  Janis Johnson  <janis187@us.ibm.com>
        2004-08-12  Ben Elliston <bje@au.ibm.com>
-       2004-08-16  Janis Johnson  <janis187@us.ibm.com>
+       2004-08-16  Janis Johnson  <janis187@us.ibm.com>
 
        * c-common.c (vector_size_helper): Remove; call
        reconstruct_complex_type() instead.

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 59c0193a0ea277b8c30cfce6a040624d0e409ba4..d307bc9f7538f7c2a7449d0168ece4ddd373292d 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -5245,16 +5245,18 @@
 (define_expand "floatdisf2"
   [(set (match_operand:SF 0 "gpc_reg_operand" "")
         (float:SF (match_operand:DI 1 "gpc_reg_operand" "")))]
-  "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_FPRS"
+  "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
   "
 {
+  rtx val = operands[1];
   if (!flag_unsafe_math_optimizations)
     {
       rtx label = gen_label_rtx ();
-      emit_insn (gen_floatdisf2_internal2 (operands[1], label));
+      val = gen_reg_rtx (DImode);
+      emit_insn (gen_floatdisf2_internal2 (val, operands[1], label));
       emit_label (label);
     }
-  emit_insn (gen_floatdisf2_internal1 (operands[0], operands[1]));
+  emit_insn (gen_floatdisf2_internal1 (operands[0], val));
   DONE;
 }")
 
@@ -5279,30 +5281,31 @@
 ;; by a bit that won't be lost at that stage, but is below the SFmode
 ;; rounding position.
 (define_expand "floatdisf2_internal2"
-  [(parallel [(set (match_dup 4)
-                  (compare:CC (and:DI (match_operand:DI 0 "" "")
-                                      (const_int 2047))
-                              (const_int 0)))
-             (set (match_dup 2) (and:DI (match_dup 0) (const_int 2047)))
-             (clobber (match_scratch:CC 7 ""))])
-   (set (match_dup 3) (ashiftrt:DI (match_dup 0) (const_int 53)))
-   (set (match_dup 3) (plus:DI (match_dup 3) (const_int 1)))
-   (set (pc) (if_then_else (eq (match_dup 4) (const_int 0))
-                          (label_ref (match_operand:DI 1 "" ""))
-                          (pc)))
-   (set (match_dup 5) (compare:CCUNS (match_dup 3) (const_int 2)))
-   (set (pc) (if_then_else (ltu (match_dup 5) (const_int 0))
-                          (label_ref (match_dup 1))
+  [(set (match_dup 3) (ashiftrt:DI (match_operand:DI 1 "" "")
+                                  (const_int 53)))
+   (parallel [(set (match_operand:DI 0 "" "") (and:DI (match_dup 1)
+                                                     (const_int 2047)))
+             (clobber (scratch:CC))])
+   (set (match_dup 3) (plus:DI (match_dup 3)
+                              (const_int 1)))
+   (set (match_dup 0) (plus:DI (match_dup 0)
+                              (const_int 2047)))
+   (set (match_dup 4) (compare:CCUNS (match_dup 3)
+                                    (const_int 3)))
+   (set (match_dup 0) (ior:DI (match_dup 0)
+                             (match_dup 1)))
+   (parallel [(set (match_dup 0) (and:DI (match_dup 0)
+                                        (const_int -2048)))
+             (clobber (scratch:CC))])
+   (set (pc) (if_then_else (geu (match_dup 4) (const_int 0))
+                          (label_ref (match_operand:DI 2 "" ""))
                           (pc)))
-   (set (match_dup 0) (xor:DI (match_dup 0) (match_dup 2)))
-   (set (match_dup 0) (ior:DI (match_dup 0) (const_int 2048)))]
-  "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_FPRS"
+   (set (match_dup 0) (match_dup 1))]
+  "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
   "
 {
-  operands[2] = gen_reg_rtx (DImode);
   operands[3] = gen_reg_rtx (DImode);
-  operands[4] = gen_reg_rtx (CCmode);
-  operands[5] = gen_reg_rtx (CCUNSmode);
+  operands[4] = gen_reg_rtx (CCUNSmode);
 }")
 \f
 ;; Define the DImode operations that can be done in a small number