return IRQ_HANDLED;
}
-static const struct rteth_config rteth_838x_cfg = {
- .family_id = RTL8380_FAMILY_ID,
- .cpu_port = 28,
- .net_irq = rtl83xx_net_irq,
- .mac_port_ctrl = rtl838x_mac_port_ctrl,
- .dma_if_intr_sts = RTL838X_DMA_IF_INTR_STS,
- .dma_if_intr_msk = RTL838X_DMA_IF_INTR_MSK,
- .dma_if_ctrl = RTL838X_DMA_IF_CTRL,
- .mac_force_mode_ctrl = RTL838X_MAC_FORCE_MODE_CTRL,
- .dma_rx_base = RTL838X_DMA_RX_BASE,
- .dma_tx_base = RTL838X_DMA_TX_BASE,
- .dma_if_rx_ring_size = rtl838x_dma_if_rx_ring_size,
- .dma_if_rx_ring_cntr = rtl838x_dma_if_rx_ring_cntr,
- .dma_if_rx_cur = RTL838X_DMA_IF_RX_CUR,
- .rst_glb_ctrl = RTL838X_RST_GLB_CTRL_0,
- .get_mac_link_sts = rtl838x_get_mac_link_sts,
- .get_mac_link_dup_sts = rtl838x_get_mac_link_dup_sts,
- .get_mac_link_spd_sts = rtl838x_get_mac_link_spd_sts,
- .get_mac_rx_pause_sts = rtl838x_get_mac_rx_pause_sts,
- .get_mac_tx_pause_sts = rtl838x_get_mac_tx_pause_sts,
- .mac = RTL838X_MAC,
- .l2_tbl_flush_ctrl = RTL838X_L2_TBL_FLUSH_CTRL,
- .update_cntr = rtl838x_update_cntr,
- .create_tx_header = rtl838x_create_tx_header,
- .decode_tag = rtl838x_decode_tag,
-};
-
-static const struct rteth_config rteth_839x_cfg = {
- .family_id = RTL8390_FAMILY_ID,
- .cpu_port = 52,
- .net_irq = rtl83xx_net_irq,
- .mac_port_ctrl = rtl839x_mac_port_ctrl,
- .dma_if_intr_sts = RTL839X_DMA_IF_INTR_STS,
- .dma_if_intr_msk = RTL839X_DMA_IF_INTR_MSK,
- .dma_if_ctrl = RTL839X_DMA_IF_CTRL,
- .mac_force_mode_ctrl = RTL839X_MAC_FORCE_MODE_CTRL,
- .dma_rx_base = RTL839X_DMA_RX_BASE,
- .dma_tx_base = RTL839X_DMA_TX_BASE,
- .dma_if_rx_ring_size = rtl839x_dma_if_rx_ring_size,
- .dma_if_rx_ring_cntr = rtl839x_dma_if_rx_ring_cntr,
- .dma_if_rx_cur = RTL839X_DMA_IF_RX_CUR,
- .rst_glb_ctrl = RTL839X_RST_GLB_CTRL,
- .get_mac_link_sts = rtl839x_get_mac_link_sts,
- .get_mac_link_dup_sts = rtl839x_get_mac_link_dup_sts,
- .get_mac_link_spd_sts = rtl839x_get_mac_link_spd_sts,
- .get_mac_rx_pause_sts = rtl839x_get_mac_rx_pause_sts,
- .get_mac_tx_pause_sts = rtl839x_get_mac_tx_pause_sts,
- .mac = RTL839X_MAC,
- .l2_tbl_flush_ctrl = RTL839X_L2_TBL_FLUSH_CTRL,
- .update_cntr = rtl839x_update_cntr,
- .create_tx_header = rtl839x_create_tx_header,
- .decode_tag = rtl839x_decode_tag,
-};
-
-static const struct rteth_config rteth_930x_cfg = {
- .family_id = RTL9300_FAMILY_ID,
- .cpu_port = 28,
- .net_irq = rtl93xx_net_irq,
- .mac_port_ctrl = rtl930x_mac_port_ctrl,
- .dma_if_intr_rx_runout_sts = RTL930X_DMA_IF_INTR_RX_RUNOUT_STS,
- .dma_if_intr_rx_done_sts = RTL930X_DMA_IF_INTR_RX_DONE_STS,
- .dma_if_intr_tx_done_sts = RTL930X_DMA_IF_INTR_TX_DONE_STS,
- .dma_if_intr_rx_runout_msk = RTL930X_DMA_IF_INTR_RX_RUNOUT_MSK,
- .dma_if_intr_rx_done_msk = RTL930X_DMA_IF_INTR_RX_DONE_MSK,
- .dma_if_intr_tx_done_msk = RTL930X_DMA_IF_INTR_TX_DONE_MSK,
- .l2_ntfy_if_intr_sts = RTL930X_L2_NTFY_IF_INTR_STS,
- .l2_ntfy_if_intr_msk = RTL930X_L2_NTFY_IF_INTR_MSK,
- .dma_if_ctrl = RTL930X_DMA_IF_CTRL,
- .mac_force_mode_ctrl = RTL930X_MAC_FORCE_MODE_CTRL,
- .dma_rx_base = RTL930X_DMA_RX_BASE,
- .dma_tx_base = RTL930X_DMA_TX_BASE,
- .dma_if_rx_ring_size = rtl930x_dma_if_rx_ring_size,
- .dma_if_rx_ring_cntr = rtl930x_dma_if_rx_ring_cntr,
- .dma_if_rx_cur = RTL930X_DMA_IF_RX_CUR,
- .rst_glb_ctrl = RTL930X_RST_GLB_CTRL_0,
- .get_mac_link_sts = rtl930x_get_mac_link_sts,
- .get_mac_link_dup_sts = rtl930x_get_mac_link_dup_sts,
- .get_mac_link_spd_sts = rtl930x_get_mac_link_spd_sts,
- .get_mac_rx_pause_sts = rtl930x_get_mac_rx_pause_sts,
- .get_mac_tx_pause_sts = rtl930x_get_mac_tx_pause_sts,
- .mac = RTL930X_MAC_L2_ADDR_CTRL,
- .l2_tbl_flush_ctrl = RTL930X_L2_TBL_FLUSH_CTRL,
- .update_cntr = rtl930x_update_cntr,
- .create_tx_header = rtl930x_create_tx_header,
- .decode_tag = rtl930x_decode_tag,
-};
-
-static const struct rteth_config rteth_931x_cfg = {
- .family_id = RTL9310_FAMILY_ID,
- .cpu_port = 56,
- .net_irq = rtl93xx_net_irq,
- .mac_port_ctrl = rtl931x_mac_port_ctrl,
- .dma_if_intr_rx_runout_sts = RTL931X_DMA_IF_INTR_RX_RUNOUT_STS,
- .dma_if_intr_rx_done_sts = RTL931X_DMA_IF_INTR_RX_DONE_STS,
- .dma_if_intr_tx_done_sts = RTL931X_DMA_IF_INTR_TX_DONE_STS,
- .dma_if_intr_rx_runout_msk = RTL931X_DMA_IF_INTR_RX_RUNOUT_MSK,
- .dma_if_intr_rx_done_msk = RTL931X_DMA_IF_INTR_RX_DONE_MSK,
- .dma_if_intr_tx_done_msk = RTL931X_DMA_IF_INTR_TX_DONE_MSK,
- .l2_ntfy_if_intr_sts = RTL931X_L2_NTFY_IF_INTR_STS,
- .l2_ntfy_if_intr_msk = RTL931X_L2_NTFY_IF_INTR_MSK,
- .dma_if_ctrl = RTL931X_DMA_IF_CTRL,
- .mac_force_mode_ctrl = RTL931X_MAC_FORCE_MODE_CTRL,
- .dma_rx_base = RTL931X_DMA_RX_BASE,
- .dma_tx_base = RTL931X_DMA_TX_BASE,
- .dma_if_rx_ring_size = rtl931x_dma_if_rx_ring_size,
- .dma_if_rx_ring_cntr = rtl931x_dma_if_rx_ring_cntr,
- .dma_if_rx_cur = RTL931X_DMA_IF_RX_CUR,
- .rst_glb_ctrl = RTL931X_RST_GLB_CTRL,
- .get_mac_link_sts = rtldsa_931x_get_mac_link_sts,
- .get_mac_link_dup_sts = rtl931x_get_mac_link_dup_sts,
- .get_mac_link_spd_sts = rtl931x_get_mac_link_spd_sts,
- .get_mac_rx_pause_sts = rtl931x_get_mac_rx_pause_sts,
- .get_mac_tx_pause_sts = rtl931x_get_mac_tx_pause_sts,
- .mac = RTL931X_MAC_L2_ADDR_CTRL,
- .l2_tbl_flush_ctrl = RTL931X_L2_TBL_FLUSH_CTRL,
- .update_cntr = rtl931x_update_cntr,
- .create_tx_header = rtl931x_create_tx_header,
- .decode_tag = rtl931x_decode_tag,
-};
-
static void rtl838x_hw_reset(struct rtl838x_eth_priv *priv)
{
u32 int_saved, nbuf;
.ndo_setup_tc = rtl83xx_setup_tc,
};
+static const struct rteth_config rteth_838x_cfg = {
+ .family_id = RTL8380_FAMILY_ID,
+ .cpu_port = 28,
+ .net_irq = rtl83xx_net_irq,
+ .mac_port_ctrl = rtl838x_mac_port_ctrl,
+ .dma_if_intr_sts = RTL838X_DMA_IF_INTR_STS,
+ .dma_if_intr_msk = RTL838X_DMA_IF_INTR_MSK,
+ .dma_if_ctrl = RTL838X_DMA_IF_CTRL,
+ .mac_force_mode_ctrl = RTL838X_MAC_FORCE_MODE_CTRL,
+ .dma_rx_base = RTL838X_DMA_RX_BASE,
+ .dma_tx_base = RTL838X_DMA_TX_BASE,
+ .dma_if_rx_ring_size = rtl838x_dma_if_rx_ring_size,
+ .dma_if_rx_ring_cntr = rtl838x_dma_if_rx_ring_cntr,
+ .dma_if_rx_cur = RTL838X_DMA_IF_RX_CUR,
+ .rst_glb_ctrl = RTL838X_RST_GLB_CTRL_0,
+ .get_mac_link_sts = rtl838x_get_mac_link_sts,
+ .get_mac_link_dup_sts = rtl838x_get_mac_link_dup_sts,
+ .get_mac_link_spd_sts = rtl838x_get_mac_link_spd_sts,
+ .get_mac_rx_pause_sts = rtl838x_get_mac_rx_pause_sts,
+ .get_mac_tx_pause_sts = rtl838x_get_mac_tx_pause_sts,
+ .mac = RTL838X_MAC,
+ .l2_tbl_flush_ctrl = RTL838X_L2_TBL_FLUSH_CTRL,
+ .update_cntr = rtl838x_update_cntr,
+ .create_tx_header = rtl838x_create_tx_header,
+ .decode_tag = rtl838x_decode_tag,
+};
+
static const struct net_device_ops rtl839x_eth_netdev_ops = {
.ndo_open = rtl838x_eth_open,
.ndo_stop = rtl838x_eth_stop,
.ndo_setup_tc = rtl83xx_setup_tc,
};
+static const struct rteth_config rteth_839x_cfg = {
+ .family_id = RTL8390_FAMILY_ID,
+ .cpu_port = 52,
+ .net_irq = rtl83xx_net_irq,
+ .mac_port_ctrl = rtl839x_mac_port_ctrl,
+ .dma_if_intr_sts = RTL839X_DMA_IF_INTR_STS,
+ .dma_if_intr_msk = RTL839X_DMA_IF_INTR_MSK,
+ .dma_if_ctrl = RTL839X_DMA_IF_CTRL,
+ .mac_force_mode_ctrl = RTL839X_MAC_FORCE_MODE_CTRL,
+ .dma_rx_base = RTL839X_DMA_RX_BASE,
+ .dma_tx_base = RTL839X_DMA_TX_BASE,
+ .dma_if_rx_ring_size = rtl839x_dma_if_rx_ring_size,
+ .dma_if_rx_ring_cntr = rtl839x_dma_if_rx_ring_cntr,
+ .dma_if_rx_cur = RTL839X_DMA_IF_RX_CUR,
+ .rst_glb_ctrl = RTL839X_RST_GLB_CTRL,
+ .get_mac_link_sts = rtl839x_get_mac_link_sts,
+ .get_mac_link_dup_sts = rtl839x_get_mac_link_dup_sts,
+ .get_mac_link_spd_sts = rtl839x_get_mac_link_spd_sts,
+ .get_mac_rx_pause_sts = rtl839x_get_mac_rx_pause_sts,
+ .get_mac_tx_pause_sts = rtl839x_get_mac_tx_pause_sts,
+ .mac = RTL839X_MAC,
+ .l2_tbl_flush_ctrl = RTL839X_L2_TBL_FLUSH_CTRL,
+ .update_cntr = rtl839x_update_cntr,
+ .create_tx_header = rtl839x_create_tx_header,
+ .decode_tag = rtl839x_decode_tag,
+};
+
static const struct net_device_ops rtl930x_eth_netdev_ops = {
.ndo_open = rtl838x_eth_open,
.ndo_stop = rtl838x_eth_stop,
.ndo_setup_tc = rtl83xx_setup_tc,
};
+static const struct rteth_config rteth_930x_cfg = {
+ .family_id = RTL9300_FAMILY_ID,
+ .cpu_port = 28,
+ .net_irq = rtl93xx_net_irq,
+ .mac_port_ctrl = rtl930x_mac_port_ctrl,
+ .dma_if_intr_rx_runout_sts = RTL930X_DMA_IF_INTR_RX_RUNOUT_STS,
+ .dma_if_intr_rx_done_sts = RTL930X_DMA_IF_INTR_RX_DONE_STS,
+ .dma_if_intr_tx_done_sts = RTL930X_DMA_IF_INTR_TX_DONE_STS,
+ .dma_if_intr_rx_runout_msk = RTL930X_DMA_IF_INTR_RX_RUNOUT_MSK,
+ .dma_if_intr_rx_done_msk = RTL930X_DMA_IF_INTR_RX_DONE_MSK,
+ .dma_if_intr_tx_done_msk = RTL930X_DMA_IF_INTR_TX_DONE_MSK,
+ .l2_ntfy_if_intr_sts = RTL930X_L2_NTFY_IF_INTR_STS,
+ .l2_ntfy_if_intr_msk = RTL930X_L2_NTFY_IF_INTR_MSK,
+ .dma_if_ctrl = RTL930X_DMA_IF_CTRL,
+ .mac_force_mode_ctrl = RTL930X_MAC_FORCE_MODE_CTRL,
+ .dma_rx_base = RTL930X_DMA_RX_BASE,
+ .dma_tx_base = RTL930X_DMA_TX_BASE,
+ .dma_if_rx_ring_size = rtl930x_dma_if_rx_ring_size,
+ .dma_if_rx_ring_cntr = rtl930x_dma_if_rx_ring_cntr,
+ .dma_if_rx_cur = RTL930X_DMA_IF_RX_CUR,
+ .rst_glb_ctrl = RTL930X_RST_GLB_CTRL_0,
+ .get_mac_link_sts = rtl930x_get_mac_link_sts,
+ .get_mac_link_dup_sts = rtl930x_get_mac_link_dup_sts,
+ .get_mac_link_spd_sts = rtl930x_get_mac_link_spd_sts,
+ .get_mac_rx_pause_sts = rtl930x_get_mac_rx_pause_sts,
+ .get_mac_tx_pause_sts = rtl930x_get_mac_tx_pause_sts,
+ .mac = RTL930X_MAC_L2_ADDR_CTRL,
+ .l2_tbl_flush_ctrl = RTL930X_L2_TBL_FLUSH_CTRL,
+ .update_cntr = rtl930x_update_cntr,
+ .create_tx_header = rtl930x_create_tx_header,
+ .decode_tag = rtl930x_decode_tag,
+};
+
static const struct net_device_ops rtl931x_eth_netdev_ops = {
.ndo_open = rtl838x_eth_open,
.ndo_stop = rtl838x_eth_stop,
.ndo_fix_features = rtl838x_fix_features,
};
+static const struct rteth_config rteth_931x_cfg = {
+ .family_id = RTL9310_FAMILY_ID,
+ .cpu_port = 56,
+ .net_irq = rtl93xx_net_irq,
+ .mac_port_ctrl = rtl931x_mac_port_ctrl,
+ .dma_if_intr_rx_runout_sts = RTL931X_DMA_IF_INTR_RX_RUNOUT_STS,
+ .dma_if_intr_rx_done_sts = RTL931X_DMA_IF_INTR_RX_DONE_STS,
+ .dma_if_intr_tx_done_sts = RTL931X_DMA_IF_INTR_TX_DONE_STS,
+ .dma_if_intr_rx_runout_msk = RTL931X_DMA_IF_INTR_RX_RUNOUT_MSK,
+ .dma_if_intr_rx_done_msk = RTL931X_DMA_IF_INTR_RX_DONE_MSK,
+ .dma_if_intr_tx_done_msk = RTL931X_DMA_IF_INTR_TX_DONE_MSK,
+ .l2_ntfy_if_intr_sts = RTL931X_L2_NTFY_IF_INTR_STS,
+ .l2_ntfy_if_intr_msk = RTL931X_L2_NTFY_IF_INTR_MSK,
+ .dma_if_ctrl = RTL931X_DMA_IF_CTRL,
+ .mac_force_mode_ctrl = RTL931X_MAC_FORCE_MODE_CTRL,
+ .dma_rx_base = RTL931X_DMA_RX_BASE,
+ .dma_tx_base = RTL931X_DMA_TX_BASE,
+ .dma_if_rx_ring_size = rtl931x_dma_if_rx_ring_size,
+ .dma_if_rx_ring_cntr = rtl931x_dma_if_rx_ring_cntr,
+ .dma_if_rx_cur = RTL931X_DMA_IF_RX_CUR,
+ .rst_glb_ctrl = RTL931X_RST_GLB_CTRL,
+ .get_mac_link_sts = rtldsa_931x_get_mac_link_sts,
+ .get_mac_link_dup_sts = rtl931x_get_mac_link_dup_sts,
+ .get_mac_link_spd_sts = rtl931x_get_mac_link_spd_sts,
+ .get_mac_rx_pause_sts = rtl931x_get_mac_rx_pause_sts,
+ .get_mac_tx_pause_sts = rtl931x_get_mac_tx_pause_sts,
+ .mac = RTL931X_MAC_L2_ADDR_CTRL,
+ .l2_tbl_flush_ctrl = RTL931X_L2_TBL_FLUSH_CTRL,
+ .update_cntr = rtl931x_update_cntr,
+ .create_tx_header = rtl931x_create_tx_header,
+ .decode_tag = rtl931x_decode_tag,
+};
+
static const struct phylink_pcs_ops rtl838x_pcs_ops = {
.pcs_get_state = rtl838x_pcs_get_state,
.pcs_an_restart = rtl838x_pcs_an_restart,