KVM: SVM: Drop pointless masking of kernel page pa's with AVIC HPA masks

Drop AVIC_HPA_MASK and all its users, the mask is just the 4KiB-aligned
maximum theoretical physical address for x86-64 CPUs, as x86-64 is
currently defined (going beyond PA52 would require an entirely new paging
mode, which would arguably create a new, different architecture).

All usage in KVM masks the result of page_to_phys(), which on x86-64 is
guaranteed to be 4KiB aligned and a legal physical address; if either of
those requirements doesn't hold true, KVM has far bigger problems.

Drop masking the avic_backing_page with
AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK for all the same reasons, but
keep the macro even though it's unused in functional code.  It's a
distinct architectural define, and having the definition in software
helps visualize the layout of an entry.  And to be hyper-paranoid about
MAXPA going beyond 52, add a compile-time assert to ensure the kernel's
maximum supported physical address stays in bounds.

The unnecessary masking in avic_init_vmcb() also incorrectly assumes that
SME's C-bit resides between bits 51:11; that holds true for current CPUs,
but isn't required by AMD's architecture:

  In some implementations, the bit used may be a physical address bit

Key word being "may".

Opportunistically use the GENMASK_ULL() version for
AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK, which is far more readable
than a set of repeating Fs.

Tested-by: Sairaj Kodilkar <sarunkod@amd.com>
Reviewed-by: Naveen N Rao (AMD) <naveen@kernel.org>
Link: https://lore.kernel.org/r/20250611224604.313496-11-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 89a666952b018b5f4162221139bb4f789864de55..36f67c69ea664b05bc3837669dfee4700a003e14 100644 (file)
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -253,7 +253,7 @@ struct __attribute__ ((__packed__)) vmcb_control_area {
 #define AVIC_LOGICAL_ID_ENTRY_VALID_MASK               (1 << 31)
 
 #define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK   GENMASK_ULL(11, 0)
-#define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK       (0xFFFFFFFFFFULL << 12)
+#define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK       GENMASK_ULL(51, 12)
 #define AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK         (1ULL << 62)
 #define AVIC_PHYSICAL_ID_ENTRY_VALID_MASK              (1ULL << 63)
 #define AVIC_PHYSICAL_ID_TABLE_SIZE_MASK               (0xFFULL)
@@ -288,8 +288,6 @@ enum avic_ipi_failure_cause {
 static_assert((AVIC_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == AVIC_MAX_PHYSICAL_ID);
 static_assert((X2AVIC_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == X2AVIC_MAX_PHYSICAL_ID);
 
-#define AVIC_HPA_MASK  ~((0xFFFULL << 52) | 0xFFF)
-
 #define SVM_SEV_FEAT_SNP_ACTIVE                                BIT(0)
 #define SVM_SEV_FEAT_RESTRICTED_INJECTION              BIT(3)
 #define SVM_SEV_FEAT_ALTERNATE_INJECTION               BIT(4)

diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index be139337c6d7aa6dc7239346ec23beeb39291739..61ea794a4dcef0ac3260e02e80b7ce8dca51d12a 100644 (file)
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -242,9 +242,9 @@ void avic_init_vmcb(struct vcpu_svm *svm, struct vmcb *vmcb)
        phys_addr_t lpa = __sme_set(page_to_phys(kvm_svm->avic_logical_id_table_page));
        phys_addr_t ppa = __sme_set(page_to_phys(kvm_svm->avic_physical_id_table_page));
 
-       vmcb->control.avic_backing_page = bpa & AVIC_HPA_MASK;
-       vmcb->control.avic_logical_id = lpa & AVIC_HPA_MASK;
-       vmcb->control.avic_physical_id = ppa & AVIC_HPA_MASK;
+       vmcb->control.avic_backing_page = bpa;
+       vmcb->control.avic_logical_id = lpa;
+       vmcb->control.avic_physical_id = ppa;
        vmcb->control.avic_vapic_bar = APIC_DEFAULT_PHYS_BASE;
 
        if (kvm_apicv_activated(svm->vcpu.kvm))
@@ -302,9 +302,12 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu)
        if (!entry)
                return -EINVAL;
 
-       new_entry = __sme_set((page_to_phys(svm->avic_backing_page) &
-                             AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK) |
-                             AVIC_PHYSICAL_ID_ENTRY_VALID_MASK);
+       /* Note, fls64() returns the bit position, +1. */
+       BUILD_BUG_ON(__PHYSICAL_MASK_SHIFT >
+                    fls64(AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK));
+
+       new_entry = __sme_set(page_to_phys(svm->avic_backing_page)) |
+                   AVIC_PHYSICAL_ID_ENTRY_VALID_MASK;
        WRITE_ONCE(*entry, new_entry);
 
        svm->avic_physical_id_cache = entry;
@@ -904,8 +907,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
                        enable_remapped_mode = false;
 
                        /* Try to enable guest_mode in IRTE */
-                       pi.base = __sme_set(page_to_phys(svm->avic_backing_page) &
-                                           AVIC_HPA_MASK);
+                       pi.base = __sme_set(page_to_phys(svm->avic_backing_page));
                        pi.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id,
                                                     svm->vcpu.vcpu_id);
                        pi.is_guest_mode = true;