"hw_engine_group_suspend_lr_queue_us"),
DEF_STAT_STR(HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
"hw_engine_group_wait_dma_queue_us"),
+ DEF_STAT_STR(PRL_4K_ENTRY_COUNT, "prl_4k_entry_count"),
+ DEF_STAT_STR(PRL_64K_ENTRY_COUNT, "prl_64k_entry_count"),
+ DEF_STAT_STR(PRL_2M_ENTRY_COUNT, "prl_2m_entry_count"),
+ DEF_STAT_STR(PRL_ISSUED_COUNT, "prl_issued_count"),
+ DEF_STAT_STR(PRL_ABORTED_COUNT, "prl_aborted_count"),
};
/**
XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_COUNT,
XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
+ XE_GT_STATS_ID_PRL_4K_ENTRY_COUNT,
+ XE_GT_STATS_ID_PRL_64K_ENTRY_COUNT,
+ XE_GT_STATS_ID_PRL_2M_ENTRY_COUNT,
+ XE_GT_STATS_ID_PRL_ISSUED_COUNT,
+ XE_GT_STATS_ID_PRL_ABORTED_COUNT,
/* must be the last entry */
__XE_GT_STATS_NUM_IDS,
};
static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
u64 gpu_addr)
{
+ struct xe_gt *gt = guc_to_gt(guc);
u32 action[] = {
XE_GUC_ACTION_PAGE_RECLAMATION,
seqno,
upper_32_bits(gpu_addr),
};
+ xe_gt_stats_incr(gt, XE_GT_STATS_ID_PRL_ISSUED_COUNT, 1);
+
return xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
G2H_LEN_DW_PAGE_RECLAMATION, 1);
}
#include "regs/xe_gt_regs.h"
#include "xe_assert.h"
+#include "xe_gt_stats.h"
#include "xe_macros.h"
#include "xe_mmio.h"
#include "xe_pat.h"
struct xe_page_reclaim_list *__prl = (prl); \
\
xe_page_reclaim_list_invalidate(__prl); \
+ xe_gt_stats_incr(__gt, XE_GT_STATS_ID_PRL_ABORTED_COUNT, 1); \
vm_dbg(>_to_xe(__gt)->drm, "PRL aborted: " fmt, ##__VA_ARGS__); \
} while (0)
#include "xe_drm_client.h"
#include "xe_exec_queue.h"
#include "xe_gt.h"
+#include "xe_gt_stats.h"
#include "xe_migrate.h"
#include "xe_page_reclaim.h"
#include "xe_pt_types.h"
struct xe_page_reclaim_list *prl,
u64 pte, struct xe_pt *xe_child)
{
+ struct xe_gt *gt = tile->primary_gt;
struct xe_guc_page_reclaim_entry *reclaim_entries = prl->entries;
u64 phys_addr = pte & XE_PTE_ADDR_MASK;
u64 phys_page = phys_addr >> XE_PTE_SHIFT;
* Only 4K, 64K (level 0), and 2M pages are supported by hardware for page reclaim
*/
if (xe_child->level == 0 && !(pte & XE_PTE_PS64)) {
+ xe_gt_stats_incr(gt, XE_GT_STATS_ID_PRL_4K_ENTRY_COUNT, 1);
reclamation_size = COMPUTE_RECLAIM_ADDRESS_MASK(SZ_4K); /* reclamation_size = 0 */
xe_tile_assert(tile, phys_addr % SZ_4K == 0);
} else if (xe_child->level == 0) {
+ xe_gt_stats_incr(gt, XE_GT_STATS_ID_PRL_64K_ENTRY_COUNT, 1);
reclamation_size = COMPUTE_RECLAIM_ADDRESS_MASK(SZ_64K); /* reclamation_size = 4 */
xe_tile_assert(tile, phys_addr % SZ_64K == 0);
} else if (xe_child->level == 1 && pte & XE_PDE_PS_2M) {
+ xe_gt_stats_incr(gt, XE_GT_STATS_ID_PRL_2M_ENTRY_COUNT, 1);
reclamation_size = COMPUTE_RECLAIM_ADDRESS_MASK(SZ_2M); /* reclamation_size = 9 */
xe_tile_assert(tile, phys_addr % SZ_2M == 0);
} else {