* m4-utils.m4: New file with m4 utilities, copied from GMP's
mpn/asm-defs.m4.
* Makefile.in (DISTFILES): Add m4-utils.m4.
+ (%.asm): Include m4-utils.m4 for preprocessing of .asm files, and
+ include config.m4 before machine.m4.
+
+ * aclocal.m4 (GMP_ASM_POWERPC_R_REGISTERS): New configure test,
+ adapted from corresponding test in GMP's acinlude.m4.
+ * configure.ac (ASM_PPC_WANT_R_REGISTERS): New substituted
+ variable. Set using GMP_ASM_POWERPC_R_REGISTERS, when powerpc64
+ assembly code is enabled.
+ * config.m4.in: Substituted here.
+ * powerpc64/machine.m4: Check ASM_PPC_WANT_R_REGISTERS, and
+ if needed, replace register names like r0, r1, ... with integers.
2020-09-15 Niels Möller <nisse@obsidian>
$(RANLIB) $@
echo hogweed > libhogweed.stamp
-%.$(OBJEXT): %.asm $(srcdir)/asm.m4 machine.m4 config.m4
- $(M4) $(srcdir)/asm.m4 machine.m4 config.m4 $< >$*.s
+%.$(OBJEXT): %.asm $(srcdir)/m4-utils.m4 $(srcdir)/asm.m4 config.m4 machine.m4
+ $(M4) $(srcdir)/m4-utils.m4 $(srcdir)/asm.m4 config.m4 machine.m4 $< >$*.s
$(COMPILE) -c $*.s
%.$(OBJEXT): %.c
AC_SUBST(EXTRA_HOGWEED_LINKER_FLAGS)
fi
])
+
+dnl GMP_ASM_POWERPC_R_REGISTERS
+dnl ---------------------------
+dnl Determine whether the assembler takes powerpc registers with an "r" as
+dnl in "r6", or as plain "6". The latter is standard, but NeXT, Rhapsody,
+dnl and MacOS-X require the "r" forms.
+dnl
+dnl See also mpn/powerpc32/powerpc-defs.m4 which uses the result of this
+dnl test.
+
+AC_DEFUN([GMP_ASM_POWERPC_R_REGISTERS],
+[AC_CACHE_CHECK([if the assembler needs r on registers],
+ gmp_cv_asm_powerpc_r_registers,
+[GMP_TRY_ASSEMBLE(
+[ $gmp_cv_asm_text
+ mtctr 6],
+[gmp_cv_asm_powerpc_r_registers=no],
+[GMP_TRY_ASSEMBLE(
+[ .text
+ mtctr r6],
+[gmp_cv_asm_powerpc_r_registers=yes],
+[AC_MSG_ERROR([neither "mtctr 6" nor "mtctr r6" works])])])])
+ASM_PPC_WANT_R_REGISTERS="$gmp_cv_asm_powerpc_r_registers"
+])
define(`WORDS_BIGENDIAN', `@ASM_WORDS_BIGENDIAN@')dnl
define(`ASM_X86_ENDBR',`@ASM_X86_ENDBR@')dnl
define(`ASM_X86_MARK_CET_ALIGN',`@ASM_X86_MARK_CET_ALIGN@')dnl
+define(`ASM_PPC_WANT_R_REGISTERS',`@ASM_PPC_WANT_R_REGISTERS@')dnl
divert(1)
@ASM_X86_MARK_CET@
@ASM_MARK_NOEXEC_STACK@
OPT_NETTLE_SOURCES=""
FAT_TEST_LIST=""
+ASM_PPC_WANT_R_REGISTERS="n/a"
# Select assembler code
asm_path=
;;
*powerpc64*)
if test "$ABI" = 64 ; then
+ GMP_ASM_POWERPC_R_REGISTERS
asm_path="powerpc64"
if test "x$enable_fat" = xyes ; then
asm_path="powerpc64/fat $asm_path"
IF_ASM='#'
fi
AC_SUBST([IF_ASM])
+AC_SUBST([ASM_PPC_WANT_R_REGISTERS])
AH_VERBATIM([HAVE_NATIVE],
[/* Define to 1 each of the following for which a native (ie. CPU specific)
define(`DATA_LOAD_VEC',
`ld $3,$2@got(2)
lvx $1,0,$3')
+
+dnl Usage: r0 ... r31, cr0 ... cr7
+dnl
+dnl Registers names, either left as "r0" etc or mapped to plain 0 etc,
+dnl according to the result of the GMP_ASM_POWERPC_REGISTERS configure
+dnl test.
+
+ifelse(ASM_PPC_WANT_R_REGISTERS,no,`
+forloop(i,0,31,`deflit(`r'i,i)')
+forloop(i,0,31,`deflit(`v'i,i)')
+forloop(i,0,31,`deflit(`f'i,i)')
+forloop(i,0,7, `deflit(`cr'i,i)')
+')
+