]> git.ipfire.org Git - thirdparty/valgrind.git/commitdiff
Get a clean(er) build on amd64. Also a couple of amd64 fe/be fixes.
authorJulian Seward <jseward@acm.org>
Mon, 7 Feb 2005 00:17:12 +0000 (00:17 +0000)
committerJulian Seward <jseward@acm.org>
Mon, 7 Feb 2005 00:17:12 +0000 (00:17 +0000)
git-svn-id: svn://svn.valgrind.org/vex/trunk@854

VEX/priv/guest-amd64/ghelpers.c
VEX/priv/guest-arm/toIR.c
VEX/priv/guest-ppc32/toIR.c
VEX/priv/guest-x86/ghelpers.c
VEX/priv/guest-x86/toIR.c
VEX/priv/host-amd64/hdefs.c
VEX/priv/host-amd64/isel.c
VEX/priv/host-x86/isel.c
VEX/priv/ir/iropt.c

index b6e80271da1e0e04d438d368046f9de43a039626..1c15a3e474a903ccbdaa921d5c1e38a3a04c9ab2 100644 (file)
@@ -182,7 +182,7 @@ void LibVEX_GuestAMD64_initialise ( /*OUT*/VexGuestAMD64State* vex_state )
    vex_state->guest_R14 = 0;
    vex_state->guest_R15 = 0;
 
-   vex_state->guest_CC_OP   = 999;//X86G_CC_OP_COPY;  // XXX ???
+   vex_state->guest_CC_OP   = AMD64G_CC_OP_COPY;
    vex_state->guest_CC_DEP1 = 0;
    vex_state->guest_CC_DEP2 = 0;
    vex_state->guest_CC_NDEP = 0;
index 10fa5940d6547463896c1e0244e197a948d01bbd..61e229eb62ea28d5890f327223a23d0fff994712 100644 (file)
@@ -276,7 +276,7 @@ IRBB* bbToIR_ARM ( UChar*           armCode,
             if (0 && (n_resteers & 0xFF) == 0)
             vex_printf("resteer[%d,%d] to %p (delta = %d)\n",
                        n_resteers, d_resteers,
-                       (void*)(UInt)(guest_next), delta);
+                       ULong_to_Ptr(guest_next), delta);
             break;
       }
    }
index 487c50e1db7b211ad0ada34e51f9ca0bae48127e..802a07640139d3a8f521608e4ed62f9841d12e7c 100644 (file)
@@ -323,7 +323,7 @@ IRBB* bbToIR_PPC32 ( UChar*           ppc32code,
             if (0 && (n_resteers & 0xFF) == 0)
             vex_printf("resteer[%d,%d] to %p (delta = %d)\n",
                        n_resteers, d_resteers,
-                       (void*)(UInt)(guest_next), delta);
+                       ULong_to_Ptr(guest_next), delta);
             break;
       }
    }
index 457a69f15739e142d4aca4edbca813900e6584e2..3cb86bfabe831c162da35f0828ca3c85f74506a5 100644 (file)
@@ -1509,7 +1509,7 @@ static void convert_f80le_to_f64le ( /*IN*/UChar* f80, /*OUT*/UChar* f64 )
 ULong x86g_loadF80le ( UInt addrU )
 {
    ULong f64;
-   convert_f80le_to_f64le ( (UChar*)addrU, (UChar*)&f64 );
+   convert_f80le_to_f64le ( (UChar*)ULong_to_Ptr(addrU), (UChar*)&f64 );
    return f64;
 }
 
@@ -1517,7 +1517,7 @@ ULong x86g_loadF80le ( UInt addrU )
 /* DIRTY HELPER (writes guest memory) */
 void x86g_storeF80le ( UInt addrU, ULong f64 )
 {
-   convert_f64le_to_f80le( (UChar*)&f64, (UChar*)addrU );
+   convert_f64le_to_f80le( (UChar*)&f64, (UChar*)ULong_to_Ptr(addrU) );
 }
 
 
index 3dac8bd5e7ed33a33547af8088c15fc01b939fae..ae7ae7e1985503e5e1f2d3af345f413f5dfb39b5 100644 (file)
@@ -358,7 +358,7 @@ IRBB* bbToIR_X86 ( UChar*           x86code,
             if (0 && (n_resteers & 0xFF) == 0)
             vex_printf("resteer[%d,%d] to %p (delta = %d)\n",
                        n_resteers, d_resteers,
-                       (void*)(UInt)(guest_next), delta);
+                       ULong_to_Ptr(guest_next), delta);
             break;
       }
    }
index b11f6706bf06c97b08a4154f8bebd3bc482b1df4..f662ec4a5907b30cdb40fc53b13e4977a706f775 100644 (file)
@@ -1044,7 +1044,7 @@ void ppAMD64Instr ( AMD64Instr* i )
          if (i->Ain.Goto.jk != Ijk_Boring) {
             vex_printf("movl $");
             ppIRJumpKind(i->Ain.Goto.jk);
-            vex_printf(",%%rbp ; ");
+            vex_printf(",%%ebp ; ");
          }
          vex_printf("movq ");
          ppAMD64RI(i->Ain.Goto.dst);
@@ -2020,7 +2020,7 @@ static UChar rexAMode_R ( HReg greg, HReg ereg )
 
 Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr* i )
 {
-   UInt irno, opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc;
+   UInt /*irno,*/ opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc;
 //.. 
 //..    UInt   xtra;
    UChar* p = &buf[0];
@@ -2417,8 +2417,10 @@ vassert(0);
 
       /* Get the destination address into %rax */
       if (i->Ain.Goto.dst->tag == Ari_Imm) {
-         /* movl $immediate, %eax ; ret */
-         *p++ = 0xB8;
+         /* movl sign-ext($immediate), %rax ; ret */
+         *p++ = 0x48;
+         *p++ = 0xC7;
+         *p++ = 0xC0;
          p = emit32(p, i->Ain.Goto.dst->Ari.Imm.imm32);
       } else {
          vassert(i->Ain.Goto.dst->tag == Ari_Reg);
index e82de7d731aecaee0ef7dc59747325bb8a1a6490..9c4dd4167c799ec071e4c669221a1a68751bc6ff 100644 (file)
@@ -216,14 +216,14 @@ static AMD64AMode*   iselIntExpr_AMode     ( ISelEnv* env, IRExpr* e );
 static AMD64CondCode iselCondCode_wrk    ( ISelEnv* env, IRExpr* e );
 static AMD64CondCode iselCondCode        ( ISelEnv* env, IRExpr* e );
 
-static HReg          iselDblExpr_wrk     ( ISelEnv* env, IRExpr* e );
-static HReg          iselDblExpr         ( ISelEnv* env, IRExpr* e );
+//static HReg          iselDblExpr_wrk     ( ISelEnv* env, IRExpr* e );
+//static HReg          iselDblExpr         ( ISelEnv* env, IRExpr* e );
 
-static HReg          iselFltExpr_wrk     ( ISelEnv* env, IRExpr* e );
-static HReg          iselFltExpr         ( ISelEnv* env, IRExpr* e );
+//static HReg          iselFltExpr_wrk     ( ISelEnv* env, IRExpr* e );
+//static HReg          iselFltExpr         ( ISelEnv* env, IRExpr* e );
 
-static HReg          iselVecExpr_wrk     ( ISelEnv* env, IRExpr* e );
-static HReg          iselVecExpr         ( ISelEnv* env, IRExpr* e );
+//static HReg          iselVecExpr_wrk     ( ISelEnv* env, IRExpr* e );
+//static HReg          iselVecExpr         ( ISelEnv* env, IRExpr* e );
 
 
 /*---------------------------------------------------------*/
@@ -2725,18 +2725,18 @@ static AMD64CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e )
 //.. /* DO NOT CALL THIS DIRECTLY */
 //.. static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
 //.. {
-//.. 
-//.. #  define REQUIRE_SSE1                                  \
-//..       do { if (env->subarch == VexSubArchX86_sse0)      \
-//..               goto vec_fail;                            \
-//..       } while (0)
-//.. 
-//.. #  define REQUIRE_SSE2                                  \
-//..       do { if (env->subarch == VexSubArchX86_sse0       \
-//..                || env->subarch == VexSubArchX86_sse1)   \
-//..               goto vec_fail;                            \
-//..       } while (0)
-//.. 
+#if 0
+#  define REQUIRE_SSE1                                  \
+      do { if (env->subarch == VexSubArchX86_sse0)      \
+              goto vec_fail;                            \
+      } while (0)
+
+#  define REQUIRE_SSE2                                  \
+      do { if (env->subarch == VexSubArchX86_sse0       \
+               || env->subarch == VexSubArchX86_sse1)   \
+              goto vec_fail;                            \
+      } while (0)
+#endif
 //..    Bool     arg1isEReg = False;
 //..    X86SseOp op = Xsse_INVALID;
 //..    IRType   ty = typeOfIRExpr(env->type_env,e);
index 26cbd187001fed7f7d8c604059f4c16b3cb275ff..b443ac9718e543218eee86bef957b3fd7ecd6930 100644 (file)
@@ -350,7 +350,8 @@ void callHelperAndClearArgs ( ISelEnv* env, X86CondCode cc,
       parameters. */
    vassert(sizeof(void*) == 4);
 
-   addInstr(env, X86Instr_Call( cc, (UInt)cee->addr, cee->regparms));
+   addInstr(env, X86Instr_Call( cc, (UInt)Ptr_to_ULong(cee->addr), 
+                                    cee->regparms));
    if (n_arg_ws > 0)
       add_to_esp(env, 4*n_arg_ws);
 }
index fc8f74578ae178a851bb6a7f3b5d36cb8e2fecd7..967b243bf694a0d93c458588a93456e7d788da8e 100644 (file)
@@ -988,11 +988,18 @@ static IRExpr* fold_Expr ( IRExpr* e )
                        (e->Iex.Binop.arg1->Iex.Const.con->Ico.U32
                         - e->Iex.Binop.arg2->Iex.Const.con->Ico.U32)));
                break;
+
             case Iop_Add32:
                e2 = IRExpr_Const(IRConst_U32(
                        (e->Iex.Binop.arg1->Iex.Const.con->Ico.U32
                         + e->Iex.Binop.arg2->Iex.Const.con->Ico.U32)));
                break;
+            case Iop_Add64:
+               e2 = IRExpr_Const(IRConst_U64(
+                       (e->Iex.Binop.arg1->Iex.Const.con->Ico.U64
+                        + e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)));
+               break;
+
             case Iop_Xor32:
                e2 = IRExpr_Const(IRConst_U32(
                        (e->Iex.Binop.arg1->Iex.Const.con->Ico.U32