]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Daily bump.
authorGCC Administrator <gccadmin@gcc.gnu.org>
Fri, 23 May 2025 00:17:35 +0000 (00:17 +0000)
committerGCC Administrator <gccadmin@gcc.gnu.org>
Fri, 23 May 2025 00:17:35 +0000 (00:17 +0000)
gcc/ChangeLog
gcc/DATESTAMP
gcc/cp/ChangeLog
gcc/m2/ChangeLog
gcc/testsuite/ChangeLog
libatomic/ChangeLog
libstdc++-v3/ChangeLog

index a0899a747a9239bdc3bd076373d4bcce25a910ee..21a26f64437c14fd00606a44d03042db0e9f8612 100644 (file)
@@ -1,3 +1,71 @@
+2025-05-22  Joseph Myers  <josmyers@redhat.com>
+
+       * doc/implement-c.texi: Document C23 implementation-defined
+       behavior.
+       (Constant expressions implementation, Types implementation): New
+       nodes.
+
+2025-05-22  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * dwarf2out.cc (loc_list_from_tree_1) <COMPONENT_REF>: Add specific
+       handling of bit-fields for big-endian targets.
+
+2025-05-22  Alexandre Oliva  <oliva@adacore.com>
+
+       * config/aarch64/aarch64-vxworks.h (TARGET_OS_USES_R18): Define.
+       Update comments.
+       * config/aarch64/aarch64.cc (aarch64_conditional_register_usage):
+       Mark x18 as fixed on VxWorks.
+       (aarch64_override_options_internal): Issue sorry message on
+       -fsanitize=shadow-call-stack if TARGET_OS_USES_R18.
+
+2025-05-22  Shreya Munnangi  <smunnangi1@ventanamicro.com>
+
+       * config/riscv/riscv.cc (synthesize_and): When profitable, use a three
+       shift sequence to clear bits at both upper and lower bits rather than
+       synthesizing the constant mask.
+
+2025-05-22  Siarhei Volkau  <lis8215@gmail.com>
+
+       PR target/70557
+       * config/riscv/riscv.md (movdi_32bit): Add "J" constraint to allow storing 0
+       directly to memory.
+
+2025-05-22  Andrew Pinski  <quic_apinski@quicinc.com>
+
+       PR target/120372
+       * config/aarch64/aarch64.cc (aarch64_rtx_costs <case CONST_INSN>): Handle
+       if outer is COMPARE and the constant can be handled by the cmp instruction.
+
+2025-05-22  Andrew Pinski  <quic_apinski@quicinc.com>
+
+       * expmed.cc (canonicalize_comparison): Use rtx_cost directly
+       instead of gen_move_insn. Print out the choice if dump is enabled.
+
+2025-05-22  Jakub Jelinek  <jakub@redhat.com>
+
+       * gimple-lower-bitint.cc (bitint_extended): New variable.
+       (bitint_large_huge::lower_shift_stmt): For LSHIFT_EXPR with
+       bitint_extended if lhs has most significant partial limb extend
+       it afterwards.
+
+2025-05-22  Xi Ruoyao  <xry111@xry111.site>
+
+       * doc/md.texi: Document the 'q' constraint for LoongArch.
+
+2025-05-22  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/120360
+       * config/i386/predicates.md (x86_64_neg_const_int_operand): New
+       predicate.
+       * config/i386/i386.md (*cmp<mode>_plus_1): New pattern.
+
+2025-05-22  Shreya Munnangi  <smunnangi1@ventanamicro.com>
+
+       * config/riscv/riscv.cc (synthesize_and): When profitable, use two
+       shift combinations to clear high or low bits rather than synthsizing
+       the constant.
+
 2025-05-22  Pengxuan Zheng  <quic_pzheng@quicinc.com>
 
        * config/aarch64/aarch64.cc (aarch64_evpc_reencode): Copy zero_op0_p and
index 7a7061068fccc305309b2f74ad7fb91f46c521f8..809477a289dbf47f4af7ae72e8b446292cf7b5b7 100644 (file)
@@ -1 +1 @@
-20250522
+20250523
index 6bc9a08614c09931008d8085d2a32b468f7d7b4f..4dbc0cfb953916dad64b940b4498bad2ca54e1d4 100644 (file)
@@ -1,3 +1,8 @@
+2025-05-22  Jason Merrill  <jason@redhat.com>
+
+       PR c++/120935
+       * cp-gimplify.cc (cp_fold): Check always_inline.
+
 2025-05-21  Iain Sandoe  <iain@sandoe.co.uk>
 
        * coroutines.cc
index 40396a2ac1ecbdec974098312e1019d64f44510e..0009211f75e427a4e8797c16de48ce640b695d22 100644 (file)
@@ -1,3 +1,10 @@
+2025-05-22  Gaius Mulley  <gaiusmod2@gmail.com>
+
+       PR modula2/120389
+       * gm2-compiler/M2GenGCC.mod (CodeXIndr): Check to see that
+       the type of left is assignment compatible with the type of
+       right.
+
 2025-05-13  Gaius Mulley  <gaiusmod2@gmail.com>
 
        PR modula2/120253
index f1d7fc44d4efcb1b57422a902053da7a40e26e86..9044e98e29cec8e3b7e9cdc53c3b592ad961918f 100644 (file)
@@ -1,3 +1,73 @@
+2025-05-22  Gaius Mulley  <gaiusmod2@gmail.com>
+
+       PR modula2/120389
+       * gm2/iso/fail/badarray3.mod: New test.
+
+2025-05-22  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * ada/acats/overflow.lst: Delete.
+       * ada/acats/run_all.sh: Do not process overflow.lst.
+
+2025-05-22  Jason Merrill  <jason@redhat.com>
+
+       * g++.dg/opt/always_inline2.C: Correct PR number.
+
+2025-05-22  Jason Merrill  <jason@redhat.com>
+
+       PR c++/120935
+       * g++.dg/opt/always_inline2.C: New test.
+       * g++.dg/debug/dwarf2/pubnames-2.C: Suppress -fimplicit-constexpr.
+       * g++.dg/debug/dwarf2/pubnames-3.C: Likewise.
+
+2025-05-22  Alexandre Oliva  <oliva@adacore.com>
+
+       * gcc.dg/cwsc1.c (CHAIN, aarch64): x9 instead x18 for __vxworks.
+       * gcc.target/aarch64/reg-alloc-4.c: Drop x18-assigned asm
+       operand on vxworks.
+       * gcc.target/aarch64/shadow_call_stack_1.c: Don't expect
+       -ffixed-x18 error on vxworks, but rather the sorry message.
+       * gcc.target/aarch64/shadow_call_stack_2.c: Skip on vxworks.
+       * gcc.target/aarch64/shadow_call_stack_3.c: Likewise.
+       * gcc.target/aarch64/shadow_call_stack_4.c: Likewise.
+       * gcc.target/aarch64/shadow_call_stack_5.c: Likewise.
+       * gcc.target/aarch64/shadow_call_stack_6.c: Likewise.
+       * gcc.target/aarch64/shadow_call_stack_7.c: Likewise.
+       * gcc.target/aarch64/shadow_call_stack_8.c: Likewise.
+       * gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
+       * gcc.target/aarch64/stack-check-prologue-20.c: Likewise.
+
+2025-05-22  Andrew Pinski  <quic_apinski@quicinc.com>
+
+       PR target/120372
+       * gcc.target/aarch64/imm_choice_comparison-2.c: New test.
+
+2025-05-22  Jakub Jelinek  <jakub@redhat.com>
+
+       * gcc.dg/bitintext.h: New file.
+       * gcc.dg/torture/bitint-82.c: New test.
+
+2025-05-22  Christophe Lyon  <christophe.lyon@linaro.org>
+
+       * lib/target-supports.exp (check_effective_target_arm_v8_1a_neon_ok_nocache): Use
+       -mcpu=unset on arm only.
+       (check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Likewise.
+       (check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Likewise.
+       (check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache): Likewise.
+       (check_effective_target_arm_v8_2a_i8mm_ok_nocache): Likewise.
+       (check_effective_target_arm_v8_2a_bf16_neon_ok_nocache): Likewise.
+       (check_effective_target_arm_v8_3a_complex_neon_ok_nocache): Likewise.
+       (check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache): Likewise.
+
+2025-05-22  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/120360
+       * gcc.target/i386/pr120360.c: New test.
+
+2025-05-22  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>
+
+       * gcc.target/riscv/cset-sext-sfb.c: Skip for -Oz.
+       * gcc.target/riscv/zba-slliuw.c: Skip for -Og.
+
 2025-05-21  Jeff Law  <jlaw@ventanamicro.com>
 
        PR target/120368
index f0901b84fb3818743fbc724075aad5a8697e2046..6716f0409174b186043930a0f43d7939ea5e832d 100644 (file)
@@ -1,3 +1,11 @@
+2025-05-22  Alexandre Oliva  <oliva@adacore.com>
+
+       * configure.tgt: Set partial_libatomic on *-*-vxworks*.
+       * configure.ac (PARTIAL_VXWORKS): New AM_CONDITIONAL.
+       * Makefile.am (libatomic_la_SOURCES): Select few sources for
+       PARTIAL_VXWORKS.
+       * configure, Makefile.in: Rebuilt.
+
 2025-05-09  David Malcolm  <dmalcolm@redhat.com>
 
        PR other/116792
index 5365b5d176087a57a76fe708ee91656904fcd22b..ab3c14455e922216c542a9a860dbcb50aab2d281 100644 (file)
@@ -1,3 +1,25 @@
+2025-05-22  Jonathan Wakely  <jwakely@redhat.com>
+           Tomasz KamiƄski  <tkaminsk@redhat.com>
+
+       * include/bits/allocated_ptr.h (_Scoped_allocation): New class
+       template.
+
+2025-05-22  Jonathan Wakely  <jwakely@redhat.com>
+
+       * testsuite/util/pstl/test_utils.h (ForwardIterator::operator++):
+       Fix return type.
+       (BidirectionalIterator::operator++): Likewise.
+       (BidirectionalIterator::operator--): Likewise.
+
+2025-05-22  Jonathan Wakely  <jwakely@redhat.com>
+
+       PR libstdc++/120367
+       * include/bits/stl_vector.h (_M_range_initialize): Initialize
+       _M_impl._M_finish.
+       * testsuite/23_containers/vector/cons/from_range.cc: Check with
+       a type that throws on construction.
+       exceptions during construction.
+
 2025-05-21  Alexandre Oliva  <oliva@adacore.com>
 
        * testsuite/21_strings/basic_string/numeric_conversions/char/stold.cc: