]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: ipq9574: Add SPI nand support
authorMd Sadre Alam <quic_mdalam@quicinc.com>
Thu, 6 Mar 2025 11:33:55 +0000 (17:03 +0530)
committerBjorn Andersson <andersson@kernel.org>
Fri, 14 Mar 2025 16:58:21 +0000 (11:58 -0500)
Add SPI NAND support for ipq9574 SoC.

Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Link: https://lore.kernel.org/r/20250306113357.126602-2-quic_mdalam@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/ipq9574.dtsi

index 4c5b8ca4812c5965a44522e13cab0cea2717d0bc..769705d398c47f1ed8419a73c4d1061ed1304ed3 100644 (file)
                        status = "disabled";
                };
 
+               qpic_bam: dma-controller@7984000 {
+                       compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+                       reg = <0x07984000 0x1c000>;
+                       interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_QPIC_AHB_CLK>;
+                       clock-names = "bam_clk";
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+                       status = "disabled";
+               };
+
+               qpic_nand: spi@79b0000 {
+                       compatible = "qcom,ipq9574-snand";
+                       reg = <0x079b0000 0x10000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       clocks = <&gcc GCC_QPIC_CLK>,
+                                <&gcc GCC_QPIC_AHB_CLK>,
+                                <&gcc GCC_QPIC_IO_MACRO_CLK>;
+                       clock-names = "core", "aon", "iom";
+                       dmas = <&qpic_bam 0>,
+                              <&qpic_bam 1>,
+                              <&qpic_bam 2>;
+                       dma-names = "tx", "rx", "cmd";
+                       status = "disabled";
+               };
+
                usb_0_qusbphy: phy@7b000 {
                        compatible = "qcom,ipq9574-qusb2-phy";
                        reg = <0x0007b000 0x180>;