arm: more testsutie fallout for mve move-immediate changes

Unfortunately, there is more fall-out in the testsuite for my changes
to use MVE move-immediate operations instead of literal pool loads.
Fixed as follows:

gcc/testsuite/ChangeLog:
	* gcc.target/arm/simd/mve-vcmp-f32-2.c: Adjust expected output.
	* gcc.target/arm/simd/pr100757.c: Likewise.
	* gcc.target/arm/simd/pr100757-2.c: Likewise.
	* gcc.target/arm/simd/pr100757-3.c: Likewise.
	* gcc.target/arm/simd/pr100757-4.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c b/gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c
index 917a95bf141a9b1c39e0eec66c2f35f158193bbc..2440cef267e26ffe926b73b998186493dbf7fd3c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c
+++ b/gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c
@@ -28,5 +28,7 @@ FUNC(>=, vcmpge)
 /* { dg-final { scan-assembler-times {\tvcmp.f32\tle, q[0-9]+, q[0-9]+\n} 1 } } */
 /* { dg-final { scan-assembler-times {\tvcmp.f32\tgt, q[0-9]+, q[0-9]+\n} 1 } } */
 /* { dg-final { scan-assembler-times {\tvcmp.f32\tge, q[0-9]+, q[0-9]+\n} 1 } } */
-/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 24 } } */ /* Constant 2.0f.  */
-/* { dg-final { scan-assembler-times {\t.word\t1077936128\n} 24 } } */ /* Constant 3.0f.  */
+/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0  @ v4sf} 6 } } */
+/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */ /* Constant 2.0f.  */
+/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #3\.0e\+0  @ v4sf} 6 } } */
+/* { dg-final { scan-assembler-not {\t.word\t1077936128\n} } } */ /* Constant 3.0f.  */

diff --git a/gcc/testsuite/gcc.target/arm/simd/pr100757-2.c b/gcc/testsuite/gcc.target/arm/simd/pr100757-2.c
index c2262b4d81e750141648d064e3863bbb8ef36933..21426fee370510cc3692e5f9d020d4e873424280 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/pr100757-2.c
+++ b/gcc/testsuite/gcc.target/arm/simd/pr100757-2.c
@@ -13,8 +13,11 @@ int fn1(int d) {
   return c;
 }
 
-/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 4 } } */ /* Constant 2.0f.  */
-/* { dg-final { scan-assembler-times {\t.word\t4\n} 4 } } */ /* Initial value for c.  */
-/* { dg-final { scan-assembler-times {\t.word\t5\n} 4 } } */ /* Possible value for c.  */
+/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0  @ v4sf} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */
+/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x4  @ v4si} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t4\n} } } */
+/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x5  @ v4si} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t5\n} } } */
 /* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask.  */
 /* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask.  */

diff --git a/gcc/testsuite/gcc.target/arm/simd/pr100757-3.c b/gcc/testsuite/gcc.target/arm/simd/pr100757-3.c
index e604555c04c9fa19f13d89b3747eb72f04fd2c9d..1640a447ee5a8d1467b0bdf1064d9114b5bb5e42 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/pr100757-3.c
+++ b/gcc/testsuite/gcc.target/arm/simd/pr100757-3.c
@@ -13,8 +13,11 @@ float fn1(int d) {
   return c;
 }
 
-/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 4 } } */ /* Constant 2.0f.  */
-/* { dg-final { scan-assembler-times {\t.word\t1084227584\n} 4 } } */ /* Initial value for c (4.0).  */
-/* { dg-final { scan-assembler-times {\t.word\t1082130432\n} 4 } } */ /* Possible value for c (5.0).  */
+/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0  @ v4sf} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */
+/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #4\.0e\+0  @ v4sf} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t1084227584\n} } } */
+/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #5\.0e\+0  @ v4sf} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t1082130432\n} } } */
 /* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask.  */
 /* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask.  */

diff --git a/gcc/testsuite/gcc.target/arm/simd/pr100757-4.c b/gcc/testsuite/gcc.target/arm/simd/pr100757-4.c
index c12040c517f2c8de174a443f6b88df61ab1f9883..7431494d62d0fff496f127fe2610df567754c58d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/pr100757-4.c
+++ b/gcc/testsuite/gcc.target/arm/simd/pr100757-4.c
@@ -13,7 +13,11 @@ int fn1(int d) {
   return c;
 }
 
-/* { dg-final { scan-assembler-times {\t.word\t0\n} 4 } } */ /* 'false' mask.  */
+
+/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0  @ v4si} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask.  */
 /* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask.  */
-/* { dg-final { scan-assembler-times {\t.word\t2\n} 4 } } */ /* Initial value for c.  */
-/* { dg-final { scan-assembler-times {\t.word\t3\n} 4 } } */ /* Possible value for c.  */
+/* { dg-final { scan-assembler-times {vmov\.i32\tq[0-7], #0x2  @ v4si} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t2\n} } } */ /* Initial value for c.  */
+/* { dg-final { scan-assembler-times {vmov\.i32\tq[0-7], #0x3  @ v4si} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t3\n} } } */ /* Possible value for c.  */

diff --git a/gcc/testsuite/gcc.target/arm/simd/pr100757.c b/gcc/testsuite/gcc.target/arm/simd/pr100757.c
index 41d6e4e2d7aa6715636c2abd908e5cb927d451a9..f1ef1bd2aec323816e9f5f177b4a24a577275d46 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/pr100757.c
+++ b/gcc/testsuite/gcc.target/arm/simd/pr100757.c
@@ -13,7 +13,10 @@ int fn1(int d) {
   return c;
 }
 
-/* { dg-final { scan-assembler-times {\t.word\t0\n} 4 } } */ /* 'false' mask.  */
+/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0  @ v4si} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask.  */
 /* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask.  */
-/* { dg-final { scan-assembler-times {\t.word\t2\n} 4 } } */ /* Initial value for c.  */
-/* { dg-final { scan-assembler-times {\t.word\t3\n} 4 } } */ /* Possible value for c.  */
+/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x2  @ v4si} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t2\n} } } */ /* Initial value for c.  */
+/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x3  @ v4si} 1 } } */
+/* { dg-final { scan-assembler-not {\t.word\t3\n} } } */ /* Possible value for c.  */