+2023-02-20 Alex Coplan <alex.coplan@arm.com>
+
+ Backported from master:
+ 2023-02-06 Alex Coplan <alex.coplan@arm.com>
+
+ PR target/104921
+ * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
+ Use correct constraint for operand 3.
+
2023-02-13 Kewen Lin <linkw@linux.ibm.com>
Backported from master:
+2023-02-20 Alex Coplan <alex.coplan@arm.com>
+
+ Backported from master:
+ 2023-02-06 Alex Coplan <alex.coplan@arm.com>
+
+ PR target/104921
+ * gcc.target/aarch64/pr104921-1.c: New test.
+ * gcc.target/aarch64/pr104921-2.c: New test.
+ * gcc.target/aarch64/pr104921.x: Include file for new tests.
+
2023-02-13 Kewen Lin <linkw@linux.ibm.com>
Backported from master:
+2023-02-20 Nelson Chu <nelson.chu@sifive.com>
+
+ Backported from master:
+ 2021-12-06 Nelson Chu <nelson.chu@sifive.com>
+
+ PR target/108339
+ * config/riscv/div.S: Add the hidden alias symbol for __udivdi3, and
+ then use HIDDEN_JUMPTARGET to target it since it is non-preemptible.
+ * config/riscv/riscv-asm.h: Added new macros HIDDEN_JUMPTARGET and
+ HIDDEN_DEF.
+
+2023-02-20 Jim Wilson <jimw@sifive.com>
+
+ Backported from master:
+ 2020-06-02 Jim Wilson <jimw@sifive.com>
+
+ * config/riscv/div.S (__divdi3): For negative arguments, change bgez
+ to bgtz.
+
2022-06-28 Release Manager
* GCC 10.4.0 released.