return vco;
}
-static long inno_hdmi_phy_rk3228_clk_round_rate(struct clk_hw *hw,
- unsigned long rate,
- unsigned long *parent_rate)
+static int inno_hdmi_phy_rk3228_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
const struct pre_pll_config *cfg = pre_pll_cfg_table;
- rate = (rate / 1000) * 1000;
+ req->rate = (req->rate / 1000) * 1000;
for (; cfg->pixclock != 0; cfg++)
- if (cfg->pixclock == rate && !cfg->fracdiv)
+ if (cfg->pixclock == req->rate && !cfg->fracdiv)
break;
if (cfg->pixclock == 0)
return -EINVAL;
- return cfg->pixclock;
+ req->rate = cfg->pixclock;
+
+ return 0;
}
static int inno_hdmi_phy_rk3228_clk_set_rate(struct clk_hw *hw,
.unprepare = inno_hdmi_phy_rk3228_clk_unprepare,
.is_prepared = inno_hdmi_phy_rk3228_clk_is_prepared,
.recalc_rate = inno_hdmi_phy_rk3228_clk_recalc_rate,
- .round_rate = inno_hdmi_phy_rk3228_clk_round_rate,
+ .determine_rate = inno_hdmi_phy_rk3228_clk_determine_rate,
.set_rate = inno_hdmi_phy_rk3228_clk_set_rate,
};
return inno->pixclock;
}
-static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw,
- unsigned long rate,
- unsigned long *parent_rate)
+static int inno_hdmi_phy_rk3328_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
const struct pre_pll_config *cfg = pre_pll_cfg_table;
- rate = (rate / 1000) * 1000;
+ req->rate = (req->rate / 1000) * 1000;
for (; cfg->pixclock != 0; cfg++)
- if (cfg->pixclock == rate)
+ if (cfg->pixclock == req->rate)
break;
if (cfg->pixclock == 0)
return -EINVAL;
- return cfg->pixclock;
+ req->rate = cfg->pixclock;
+
+ return 0;
}
static int inno_hdmi_phy_rk3328_clk_set_rate(struct clk_hw *hw,
.unprepare = inno_hdmi_phy_rk3328_clk_unprepare,
.is_prepared = inno_hdmi_phy_rk3328_clk_is_prepared,
.recalc_rate = inno_hdmi_phy_rk3328_clk_recalc_rate,
- .round_rate = inno_hdmi_phy_rk3328_clk_round_rate,
+ .determine_rate = inno_hdmi_phy_rk3328_clk_determine_rate,
.set_rate = inno_hdmi_phy_rk3328_clk_set_rate,
};