sim: bfin: clean up astat reg name decode a little

The compiler pointed out we checked AZ twice.  Sort by name to avoid
that in the future, and to make it clearer that we have coverage of
all the bits.  And add the bits we were missing.

The order here doesn't matter as it's just turning a pointer into a
human readable string when store tracing is enabled.

diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index 4fa5ccc315c7428a6e9d7d1888b3d7655f4e1f9e..1a9b499ebb4c0545f6e1207da603ecbabbc2ee00 100644 (file)
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -504,6 +504,16 @@ get_store_name (SIM_CPU *cpu, bu32 *p)
     return greg_names[4 * 8 + 2];
   else if (p == &AWREG (1))
     return greg_names[4 * 8 + 3];
+  else if (p == &ASTATREG (ac0))
+    return "ASTAT[ac0]";
+  else if (p == &ASTATREG (ac0_copy))
+    return "ASTAT[ac0_copy]";
+  else if (p == &ASTATREG (ac1))
+    return "ASTAT[ac1]";
+  else if (p == &ASTATREG (an))
+    return "ASTAT[an]";
+  else if (p == &ASTATREG (aq))
+    return "ASTAT[aq]";
   else if (p == &ASTATREG (av0))
     return "ASTAT[av0]";
   else if (p == &ASTATREG (av0s))
@@ -512,22 +522,14 @@ get_store_name (SIM_CPU *cpu, bu32 *p)
     return "ASTAT[av1]";
   else if (p == &ASTATREG (av1s))
     return "ASTAT[av1s]";
+  else if (p == &ASTATREG (az))
+    return "ASTAT[az]";
   else if (p == &ASTATREG (v))
     return "ASTAT[v]";
-  else if (p == &ASTATREG (vs))
-    return "ASTAT[vs]";
   else if (p == &ASTATREG (v_copy))
     return "ASTAT[v_copy]";
-  else if (p == &ASTATREG (az))
-    return "ASTAT[az]";
-  else if (p == &ASTATREG (an))
-    return "ASTAT[an]";
-  else if (p == &ASTATREG (az))
-    return "ASTAT[az]";
-  else if (p == &ASTATREG (ac0))
-    return "ASTAT[ac0]";
-  else if (p == &ASTATREG (ac0_copy))
-    return "ASTAT[ac0_copy]";
+  else if (p == &ASTATREG (vs))
+    return "ASTAT[vs]";
   else
     {
       /* Worry about this when we start to STORE() it.  */