xtensa: Fix conflicting hard regno between indirect sibcall fixups and EH_RETURN_STAC...

The hard register A10 was already allocated for EH_RETURN_STACKADJ_RTX.
(although exception handling and sibling call may not apply at the same time,
 but for safety)

gcc/ChangeLog:

	* config/xtensa/xtensa.md: Change hard register number used in
	the split patterns for indirect sibling call fixups from 10 to 11,
	the last free one for the CALL0 ABI.

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 899ce2755aa2a12676e43f3860b6c02de0036930..1294aab6c5d2a54d720e98be23ceffa9fbc42959 100644 (file)
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -25,7 +25,7 @@
   (A7_REG              7)
   (A8_REG              8)
   (A9_REG              9)
-  (A10_REG             10)
+  (A11_REG             11)
 
   (UNSPEC_NOP          2)
   (UNSPEC_PLT          3)
@@ -2295,9 +2295,9 @@
   "reload_completed
    && !TARGET_WINDOWED_ABI && SIBLING_CALL_P (insn)
    && ! call_used_or_fixed_reg_p (REGNO (operands[0]))"
-  [(set (reg:SI A10_REG)
+  [(set (reg:SI A11_REG)
        (match_dup 0))
-   (call (mem:SI (reg:SI A10_REG))
+   (call (mem:SI (reg:SI A11_REG))
         (match_dup 1))])
 
 (define_expand "sibcall_value"
@@ -2328,10 +2328,10 @@
   "reload_completed
    && !TARGET_WINDOWED_ABI && SIBLING_CALL_P (insn)
    && ! call_used_or_fixed_reg_p (REGNO (operands[1]))"
-  [(set (reg:SI A10_REG)
+  [(set (reg:SI A11_REG)
        (match_dup 1))
    (set (match_dup 0)
-       (call (mem:SI (reg:SI A10_REG))
+       (call (mem:SI (reg:SI A11_REG))
              (match_dup 2)))])
 
 (define_insn "entry"