arm64/sysreg: Add ICC_PPI_{C/S}PENDR<n>_EL1

Add ICC_PPI_{C/S}PENDR<n>_EL1 registers description.

Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20250703-gicv5-host-v7-8-12e71f1b3528@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index f1650034e34841b4f5af4e05f3f65eb23c2d27a2..78a51fbf3a991a8f466809bf002fe76987a5e6bc 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -3271,6 +3271,89 @@ Sysreg   ICC_PPI_SACTIVER1_EL1   3       0       12      13      3
 Fields ICC_PPI_ACTIVERx_EL1
 EndSysreg
 
+SysregFields   ICC_PPI_PENDRx_EL1
+Field  63      Pend63
+Field  62      Pend62
+Field  61      Pend61
+Field  60      Pend60
+Field  59      Pend59
+Field  58      Pend58
+Field  57      Pend57
+Field  56      Pend56
+Field  55      Pend55
+Field  54      Pend54
+Field  53      Pend53
+Field  52      Pend52
+Field  51      Pend51
+Field  50      Pend50
+Field  49      Pend49
+Field  48      Pend48
+Field  47      Pend47
+Field  46      Pend46
+Field  45      Pend45
+Field  44      Pend44
+Field  43      Pend43
+Field  42      Pend42
+Field  41      Pend41
+Field  40      Pend40
+Field  39      Pend39
+Field  38      Pend38
+Field  37      Pend37
+Field  36      Pend36
+Field  35      Pend35
+Field  34      Pend34
+Field  33      Pend33
+Field  32      Pend32
+Field  31      Pend31
+Field  30      Pend30
+Field  29      Pend29
+Field  28      Pend28
+Field  27      Pend27
+Field  26      Pend26
+Field  25      Pend25
+Field  24      Pend24
+Field  23      Pend23
+Field  22      Pend22
+Field  21      Pend21
+Field  20      Pend20
+Field  19      Pend19
+Field  18      Pend18
+Field  17      Pend17
+Field  16      Pend16
+Field  15      Pend15
+Field  14      Pend14
+Field  13      Pend13
+Field  12      Pend12
+Field  11      Pend11
+Field  10      Pend10
+Field  9       Pend9
+Field  8       Pend8
+Field  7       Pend7
+Field  6       Pend6
+Field  5       Pend5
+Field  4       Pend4
+Field  3       Pend3
+Field  2       Pend2
+Field  1       Pend1
+Field  0       Pend0
+EndSysregFields
+
+Sysreg ICC_PPI_CPENDR0_EL1     3       0       12      13      4
+Fields ICC_PPI_PENDRx_EL1
+EndSysreg
+
+Sysreg ICC_PPI_CPENDR1_EL1     3       0       12      13      5
+Fields ICC_PPI_PENDRx_EL1
+EndSysreg
+
+Sysreg ICC_PPI_SPENDR0_EL1     3       0       12      13      6
+Fields ICC_PPI_PENDRx_EL1
+EndSysreg
+
+Sysreg ICC_PPI_SPENDR1_EL1     3       0       12      13      7
+Fields ICC_PPI_PENDRx_EL1
+EndSysreg
+
 SysregFields   ICC_PPI_PRIORITYRx_EL1
 Res0   63:61
 Field  60:56   Priority7