pmdomain: rockchip: Add support for RK3528

Add configuration and power domains for RK3528 SoC.

Only PD_GPU can fully be powered down. PD_RKVDEC, PD_RKVENC, PD_VO and
PD_VPU are used by miscellaneous devices in RK3528.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250518220707.669515-3-jonas@kwiboo.se
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c
index 4cce407bb1eb084c2e19f5300431c51a29cf20db..242570c505fb6517beacf54720f77dff2fc3ba5a 100644 (file)
--- a/drivers/pmdomain/rockchip/pm-domains.c
+++ b/drivers/pmdomain/rockchip/pm-domains.c
@@ -35,6 +35,7 @@
 #include <dt-bindings/power/rk3366-power.h>
 #include <dt-bindings/power/rk3368-power.h>
 #include <dt-bindings/power/rk3399-power.h>
+#include <dt-bindings/power/rockchip,rk3528-power.h>
 #include <dt-bindings/power/rockchip,rk3562-power.h>
 #include <dt-bindings/power/rk3568-power.h>
 #include <dt-bindings/power/rockchip,rk3576-power.h>
@@ -216,6 +217,9 @@ struct rockchip_pmu {
 #define DOMAIN_RK3399(name, pwr, status, req, wakeup)          \
        DOMAIN(name, pwr, status, req, req, req, wakeup)
 
+#define DOMAIN_RK3528(name, pwr, req)          \
+       DOMAIN_M(name, pwr, pwr, req, req, req, false)
+
 #define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup)             \
        DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false)
 
@@ -1215,6 +1219,14 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
        [RK3399_PD_SDIOAUDIO]   = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true),
 };
 
+static const struct rockchip_domain_info rk3528_pm_domains[] = {
+       [RK3528_PD_GPU]         = DOMAIN_RK3528("gpu",  BIT(0), BIT(4)),
+       [RK3528_PD_RKVDEC]      = DOMAIN_RK3528("vdec",      0, BIT(5)),
+       [RK3528_PD_RKVENC]      = DOMAIN_RK3528("venc",      0, BIT(6)),
+       [RK3528_PD_VO]          = DOMAIN_RK3528("vo",        0, BIT(7)),
+       [RK3528_PD_VPU]         = DOMAIN_RK3528("vpu",       0, BIT(8)),
+};
+
 static const struct rockchip_domain_info rk3562_pm_domains[] = {
                                             /* name           pwr     req     g_mask  mem wakeup */
        [RK3562_PD_GPU]         = DOMAIN_RK3562("gpu",         BIT(0), BIT(1), BIT(1), 0, false),
@@ -1428,6 +1440,17 @@ static const struct rockchip_pmu_info rk3399_pmu = {
        .domain_info = rk3399_pm_domains,
 };
 
+static const struct rockchip_pmu_info rk3528_pmu = {
+       .pwr_offset = 0x1210,
+       .status_offset = 0x1230,
+       .req_offset = 0x1110,
+       .idle_offset = 0x1128,
+       .ack_offset = 0x1120,
+
+       .num_domains = ARRAY_SIZE(rk3528_pm_domains),
+       .domain_info = rk3528_pm_domains,
+};
+
 static const struct rockchip_pmu_info rk3562_pmu = {
        .pwr_offset = 0x210,
        .status_offset = 0x230,
@@ -1538,6 +1561,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
                .compatible = "rockchip,rk3399-power-controller",
                .data = (void *)&rk3399_pmu,
        },
+       {
+               .compatible = "rockchip,rk3528-power-controller",
+               .data = (void *)&rk3528_pmu,
+       },
        {
                .compatible = "rockchip,rk3562-power-controller",
                .data = (void *)&rk3562_pmu,