drm/amdgpu/pm: align Hawaii mclk workaround with radeon

commit 1987c79b4fe5789dfa14423e78b5c25f6acf3e9d upstream.

Align the hawaii mclk workaround with radeon and windows.

Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 9649528b637f668c5af9f2b83ca4ad8576ae2121)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
index 05ce0616a17f637778266bbcb7ca7844eeecc992..7d5df18db8d26849d60f4416f706ea32955f1118 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
@@ -1329,10 +1329,10 @@ static int ci_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
        if ((dpm_table->mclk_table.count >= 2) &&
            ((dev_id == 0x67B0) ||  (dev_id == 0x67B1)) &&
            (adev->pdev->revision == 0)) {
-               smu_data->smc_state_table.MemoryLevel[1].MinVddci =
-                               smu_data->smc_state_table.MemoryLevel[0].MinVddci;
-               smu_data->smc_state_table.MemoryLevel[1].MinMvdd =
-                               smu_data->smc_state_table.MemoryLevel[0].MinMvdd;
+               smu_data->smc_state_table.MemoryLevel[1].MinVddc =
+                               smu_data->smc_state_table.MemoryLevel[0].MinVddc;
+               smu_data->smc_state_table.MemoryLevel[1].MinVddcPhases =
+                               smu_data->smc_state_table.MemoryLevel[0].MinVddcPhases;
        }
        smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;
        CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel);