#define RISCV_HWPROBE_EXT_ZICBOP (1ULL << 60)
#define RISCV_HWPROBE_EXT_ZILSD (1ULL << 61)
#define RISCV_HWPROBE_EXT_ZCLSD (1ULL << 62)
+#define RISCV_HWPROBE_EXT_ZICFILP (1ULL << 63)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0 14
#define RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE 15
#define RISCV_HWPROBE_KEY_IMA_EXT_1 16
+#define RISCV_HWPROBE_EXT_ZICFISS (1ULL << 0)
+
/* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
/* Flags */
EXT_KEY(isainfo->isa, ZICBOM, pair->value, missing);
EXT_KEY(isainfo->isa, ZICBOP, pair->value, missing);
EXT_KEY(isainfo->isa, ZICBOZ, pair->value, missing);
+ EXT_KEY(isainfo->isa, ZICFILP, pair->value, missing);
EXT_KEY(isainfo->isa, ZICNTR, pair->value, missing);
EXT_KEY(isainfo->isa, ZICOND, pair->value, missing);
EXT_KEY(isainfo->isa, ZIHINTNTL, pair->value, missing);
* doesn't have.
*/
for_each_cpu(cpu, cpus) {
- /* struct riscv_isainfo *isainfo = &hart_isa[cpu]; */
+ struct riscv_isainfo *isainfo = &hart_isa[cpu];
/*
* Only use EXT_KEY() for extensions which can be
* configuration, as no other checks, besides presence
* in the hart_isa bitmap, are made.
*/
- /* Nothing here yet */
+ EXT_KEY(isainfo->isa, ZICFISS, pair->value, missing);
}
/* Now turn off reporting features if any CPU is missing it. */