]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
amd-pstate: Introduce a tracepoint trace_amd_pstate_cppc_req2()
authorGautham R. Shenoy <gautham.shenoy@amd.com>
Thu, 26 Mar 2026 11:47:51 +0000 (17:17 +0530)
committerMario Limonciello (AMD) <superm1@kernel.org>
Thu, 2 Apr 2026 16:28:31 +0000 (11:28 -0500)
Introduce a new tracepoint trace_amd_pstate_cppc_req2() to track
updates to MSR_AMD_CPPC_REQ2.

Invoke this while changing the Floor Perf.

Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
drivers/cpufreq/amd-pstate-trace.h
drivers/cpufreq/amd-pstate.c

index 32e1bdc588c52d33f57faaa2ce39d37c22621f89..91fa073b2be482df36197cfe80d923db9053a4b1 100644 (file)
@@ -133,6 +133,41 @@ TRACE_EVENT(amd_pstate_epp_perf,
                 )
 );
 
+TRACE_EVENT(amd_pstate_cppc_req2,
+
+       TP_PROTO(unsigned int cpu_id,
+                u8 floor_perf,
+                bool changed,
+                int err_code
+                ),
+
+       TP_ARGS(cpu_id,
+               floor_perf,
+               changed,
+               err_code),
+
+       TP_STRUCT__entry(
+               __field(unsigned int, cpu_id)
+               __field(u8, floor_perf)
+               __field(bool, changed)
+               __field(int, err_code)
+               ),
+
+       TP_fast_assign(
+               __entry->cpu_id = cpu_id;
+               __entry->floor_perf = floor_perf;
+               __entry->changed = changed;
+               __entry->err_code = err_code;
+               ),
+
+       TP_printk("cpu%u: floor_perf=%u, changed=%u (error = %d)",
+                 __entry->cpu_id,
+                 __entry->floor_perf,
+                 __entry->changed,
+                 __entry->err_code
+                )
+);
+
 #endif /* _AMD_PSTATE_TRACE_H */
 
 /* This part must be outside protection */
index a068c4457a8f7bbebeb3c26435f0afb6f0d5aa9b..5eae74a67aeb6f03b14c0821364a5299c79a7428 100644 (file)
@@ -333,6 +333,7 @@ static int amd_pstate_set_floor_perf(struct cpufreq_policy *policy, u8 perf)
 {
        struct amd_cpudata *cpudata = policy->driver_data;
        u64 value, prev;
+       bool changed;
        int ret;
 
        if (!cpu_feature_enabled(X86_FEATURE_CPPC_PERF_PRIO))
@@ -341,17 +342,24 @@ static int amd_pstate_set_floor_perf(struct cpufreq_policy *policy, u8 perf)
        value = prev = READ_ONCE(cpudata->cppc_req2_cached);
        FIELD_MODIFY(AMD_CPPC_FLOOR_PERF_MASK, &value, perf);
 
-       if (value == prev)
-               return 0;
+       changed = value != prev;
+       if (!changed) {
+               ret = 0;
+               goto out_trace;
+       }
 
        ret = wrmsrq_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ2, value);
        if (ret) {
+               changed = false;
                pr_err("failed to set CPPC REQ2 value. Error (%d)\n", ret);
-               return ret;
+               goto out_trace;
        }
 
        WRITE_ONCE(cpudata->cppc_req2_cached, value);
 
+out_trace:
+       if (trace_amd_pstate_cppc_req2_enabled())
+               trace_amd_pstate_cppc_req2(cpudata->cpu, perf, changed, ret);
        return ret;
 }