arm64: dts: qcom: sdm845: Fix interrupt types of camss interrupts

[ Upstream commit cb96722b728e81ad97f5b5b20dea64cd294a5452 ]

Qualcomm IP catalog says that all CAMSS interrupts is edge rising,
fix it in the CAMSS device tree node for sdm845 SoC.

Fixes: d48a6698a6b7 ("arm64: dts: qcom: sdm845: Add CAMSS ISP node")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20241127122950.885982-6-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index cff5423e9c88dcb29d6a10685e43e5dfd29886fa..69212445d22c91225f21f8628d2c1bd0ab882b36 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3948,16 +3948,16 @@
                                "vfe1",
                                "vfe_lite";
 
-                       interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>;
                        interrupt-names = "csid0",
                                "csid1",
                                "csid2",