target/119010 - Zen4/Zen5 reservations for movlhps loads

The following fixes up the ssemov2 type introduction, amending
the znver4_sse_mov_fp_load reservation.  This fixes

;;      14--> b  0: i1436 xmm6=vec_concat(xmm6,[ax+0x8])          :nothing

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_mov_fp_load,
	znver5_sse_mov_fp_load): Also match ssemov2.

diff --git a/gcc/config/i386/zn4zn5.md b/gcc/config/i386/zn4zn5.md
index 1ac1d07c04b8898f85b61e88bc2a4e518180d048..ecb1e3bbedbab62c4790b2f54dfc8ce3561205d4 100644 (file)
--- a/gcc/config/i386/zn4zn5.md
+++ b/gcc/config/i386/zn4zn5.md
@@ -1036,14 +1036,14 @@
 
 (define_insn_reservation "znver4_sse_mov_fp_load" 6
                         (and (eq_attr "cpu" "znver4")
-                             (and (eq_attr "type" "ssemov")
+                             (and (eq_attr "type" "ssemov,ssemov2")
                                   (and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
                                    (eq_attr "memory" "load"))))
                         "znver4-direct,znver4-load,znver4-fpu")
 
 (define_insn_reservation "znver5_sse_mov_fp_load" 6
                         (and (eq_attr "cpu" "znver5")
-                             (and (eq_attr "type" "ssemov")
+                             (and (eq_attr "type" "ssemov,ssemov2")
                                   (and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
                                    (eq_attr "memory" "load"))))
                         "znver4-direct,znver5-load,znver4-fpu")