backport: re PR target/83660 (ICE with vec_extract inside expression statement)

2018-04-23  Aaron Sawdey  <acsawdey@linux.ibm.com>

	Backport from mainline
	2018-04-16  Aaron Sawdey  <acsawdey@linux.ibm.com>

	PR target/83660
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Mark
	vec_extract expression as having side effects to make sure it gets
	a cleanup point.

2018-04-23  Aaron Sawdey  <acsawdey@linux.ibm.com>

	Backport from mainline
	2018-04-16  Aaron Sawdey  <acsawdey@linux.ibm.com>

	PR target/83660
	* gcc.target/powerpc/pr83660.C: New test.

From-SVN: r259586

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b7155e69dae56c4c440c95b8cf490609d68df0d8..c75e50dbca0a7b5af053c56ec41bde8fc3168f8a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2018-04-23  Aaron Sawdey  <acsawdey@linux.ibm.com>
+
+       Backport from mainline
+       2018-04-16  Aaron Sawdey  <acsawdey@linux.ibm.com>
+
+       PR target/83660
+       * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Mark
+       vec_extract expression as having side effects to make sure it gets
+       a cleanup point.
+
 2018-04-23  Eric Botcazou  <ebotcazou@adacore.com>
 
        PR middle-end/85496

diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 74f7bd522dc2a6d0e3793a35e3f85bb18e6bcbac..4a9a4794dcd943ed72459a98386d182c9ee5b0ac 100644 (file)
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -4919,6 +4919,15 @@ assignment for unaligned loads and stores");
       stmt = build_binary_op (loc, PLUS_EXPR, stmt, arg2, 1);
       stmt = build_indirect_ref (loc, stmt, RO_NULL);
 
+      /* PR83660: We mark this as having side effects so that
+        downstream in fold_build_cleanup_point_expr () it will get a
+        CLEANUP_POINT_EXPR.  If it does not we can run into an ICE
+        later in gimplify_cleanup_point_expr ().  Potentially this
+        causes missed optimization because the actually is no side
+        effect.  */
+      if (c_dialect_cxx ())
+       TREE_SIDE_EFFECTS (stmt) = 1;
+
       return stmt;
     }
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index adaf01837ab61f78863008686e1368751474bf17..2f36f83abf9321cf716f97d5bab334fc0b6eab3e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2018-04-23  Aaron Sawdey  <acsawdey@linux.ibm.com>
+
+       Backport from mainline
+       2018-04-16  Aaron Sawdey  <acsawdey@linux.ibm.com>
+
+       PR target/83660
+       * gcc.target/powerpc/pr83660.C: New test.
+
 2018-04-23  Eric Botcazou  <ebotcazou@adacore.com>
 
        * g++.dg/torture/pr85496.C: New test.

diff --git a/gcc/testsuite/gcc.target/powerpc/pr83660.C b/gcc/testsuite/gcc.target/powerpc/pr83660.C
new file mode 100644 (file)
index 0000000..60adcda
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr83660.C
@@ -0,0 +1,14 @@
+/* PR target/83660 */
+/* { dg-do compile } */
+/* { dg-options "-mcpu=power7" } */
+
+#include <altivec.h>
+
+typedef __vector unsigned int  uvec32_t  __attribute__((__aligned__(16)));
+
+unsigned get_word(uvec32_t v)
+{
+    return ({const unsigned _B1 = 32;
+            vec_extract((uvec32_t)v, 2);});
+}
+