--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -192,6 +192,26 @@
+@@ -192,6 +192,30 @@
status = "disabled";
};
+ mdio0: mdio@88000 {
++ compatible = "qcom,ipq5018-mdio", "qcom,qca-mdio";
++ reg = <0x00088000 0x64>;
+ #address-cells = <1>;
+ #size-cells = <0>;
-+ compatible = "qcom,ipq5018-mdio", "qcom,qca-mdio";
-+ reg = <0x88000 0x64>;
++
+ clocks = <&gcc GCC_MDIO0_AHB_CLK>;
+ clock-names = "gcc_mdio_ahb_clk";
++
+ status = "disabled";
+ };
+
+ mdio1: mdio@90000 {
++ compatible = "qcom,ipq5018-mdio";
++ reg = <0x00090000 0x64>;
+ #address-cells = <1>;
+ #size-cells = <0>;
-+ compatible = "qcom,ipq5018-mdio";
-+ reg = <0x90000 0x64>;
++
+ clocks = <&gcc GCC_MDIO1_AHB_CLK>;
+ clock-names = "gcc_mdio_ahb_clk";
++
+ status = "disabled";
+ };
+
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -210,6 +210,22 @@
- clocks = <&gcc GCC_MDIO1_AHB_CLK>;
+@@ -202,6 +202,21 @@
clock-names = "gcc_mdio_ahb_clk";
+
status = "disabled";
+
+ ge_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-id004d.d0c0";
+ reg = <7>;
-+
+ clocks = <&gcc GCC_GEPHY_RX_CLK>,
+ <&gcc GCC_GEPHY_TX_CLK>;
+
+ };
};
- cmn_pll: clock-controller@9b000 {
-@@ -394,8 +410,8 @@
+ mdio1: mdio@90000 {
+@@ -398,8 +413,8 @@
<&pcie0_phy>,
<&pcie1_phy>,
<0>,