iommu/vt-d: Update the virtual command related registers

[ Upstream commit 4d99efb229e63928c6b03a756a2e38cd4777fbe8 ]

The VT-d spec Revision 3.3 updated the virtual command registers, virtual
command opcode B register, virtual command response register and virtual
command capability register (Section 10.4.43, 10.4.44, 10.4.45, 10.4.46).
This updates the virtual command interface implementation in the Intel
IOMMU driver accordingly.

Fixes: 24f27d32ab6b7 ("iommu/vt-d: Enlightened PASID allocation")
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Sanjay Kumar <sanjay.k.kumar@intel.com>
Cc: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20210713042649.3547403-1-baolu.lu@linux.intel.com
Link: https://lore.kernel.org/r/20210818134852.1847070-2-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/iommu/intel/pasid.h b/drivers/iommu/intel/pasid.h
index c11bc8b833b8ee59c0ef8c9b74f8a9316e2b43f0..d5552e2c160d2081e83ca7855c23d5ea5c3a720d 100644 (file)
--- a/drivers/iommu/intel/pasid.h
+++ b/drivers/iommu/intel/pasid.h
@@ -28,12 +28,12 @@
 #define VCMD_CMD_ALLOC                 0x1
 #define VCMD_CMD_FREE                  0x2
 #define VCMD_VRSP_IP                   0x1
-#define VCMD_VRSP_SC(e)                        (((e) >> 1) & 0x3)
+#define VCMD_VRSP_SC(e)                        (((e) & 0xff) >> 1)
 #define VCMD_VRSP_SC_SUCCESS           0
-#define VCMD_VRSP_SC_NO_PASID_AVAIL    2
-#define VCMD_VRSP_SC_INVALID_PASID     2
-#define VCMD_VRSP_RESULT_PASID(e)      (((e) >> 8) & 0xfffff)
-#define VCMD_CMD_OPERAND(e)            ((e) << 8)
+#define VCMD_VRSP_SC_NO_PASID_AVAIL    16
+#define VCMD_VRSP_SC_INVALID_PASID     16
+#define VCMD_VRSP_RESULT_PASID(e)      (((e) >> 16) & 0xfffff)
+#define VCMD_CMD_OPERAND(e)            ((e) << 16)
 /*
  * Domain ID reserved for pasid entries programmed for first-level
  * only and pass-through transfer modes.

diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 03faf20a6817e86e2124435420f765dd1500cc93..cf2dafe3ce608a94d8e07f08826167a14386c60f 100644 (file)
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -124,9 +124,9 @@
 #define DMAR_MTRR_PHYSMASK8_REG 0x208
 #define DMAR_MTRR_PHYSBASE9_REG 0x210
 #define DMAR_MTRR_PHYSMASK9_REG 0x218
-#define DMAR_VCCAP_REG         0xe00 /* Virtual command capability register */
-#define DMAR_VCMD_REG          0xe10 /* Virtual command register */
-#define DMAR_VCRSP_REG         0xe20 /* Virtual command response register */
+#define DMAR_VCCAP_REG         0xe30 /* Virtual command capability register */
+#define DMAR_VCMD_REG          0xe00 /* Virtual command register */
+#define DMAR_VCRSP_REG         0xe10 /* Virtual command response register */
 
 #define DMAR_IQER_REG_IQEI(reg)                FIELD_GET(GENMASK_ULL(3, 0), reg)
 #define DMAR_IQER_REG_ITESID(reg)      FIELD_GET(GENMASK_ULL(47, 32), reg)