drm/xe: Add IRQ page to HW engine definition

For each HW engine definition, we already make changes to the IRQ
offset, as required when using MSI-X, but we leave actual MEMIRQ
page selection to the MEMIRQ handler, repeated on every interrupt.

As a preparation step to simplify the MEMIRQ handler, store the
MEMIRQ page number as part of the HW engine definition.

Suggested-by: Ilia Levi <ilia.levi@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Ilia Levi <ilia.levi@intel.com>
Reviewed-by: Ilia Levi <ilia.levi@intel.com>
Link: https://patch.msgid.link/20260518192547.600-2-michal.wajdeczko@intel.com

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 05f0932dbb9482839d79f9ca328f90900e907806..8c66ff6f3d3c639205b7374ebcf86e19f6529f1e 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -514,9 +514,14 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
        hwe->class = info->class;
        hwe->instance = info->instance;
        hwe->mmio_base = info->mmio_base;
-       hwe->irq_offset = xe_device_has_msix(gt_to_xe(gt)) ?
-               get_msix_irq_offset(gt, info->class) :
-               info->irq_offset;
+       if (xe_device_has_msix(gt_to_xe(gt))) {
+               hwe->irq_offset = get_msix_irq_offset(gt, info->class);
+               hwe->irq_page = info->instance;
+
+       } else {
+               hwe->irq_offset = info->irq_offset;
+               hwe->irq_page = 0;
+       }
        hwe->domain = info->domain;
        hwe->name = info->name;
        hwe->fence_irq = &gt->fence_irq[info->class];

diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
index 0f87128c6529090081e70ec0644a2ce2ad26d713..2cf898e682f5544207247f59bd5cdea8d65256c9 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
@@ -118,6 +118,8 @@ struct xe_hw_engine {
        u16 logical_instance;
        /** @irq_offset: IRQ offset of this hw engine */
        u16 irq_offset;
+       /** @irq_page: MEMIRQ page used by this HW engine */
+       u16 irq_page;
        /** @mmio_base: MMIO base address of this hw engine*/
        u32 mmio_base;
        /**