arm64: dts: imx8mp: Add pinctrl config definitions

Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
register is written in the dts, these values are not obvious. Add defines
which describe the fields of this register which can be or-ed together to
produce readable settings.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
index 0fef066471ba607be02d0ab15da5a048a8a213a7..16f5899de415263da40928078c4c381099728fd5 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
@@ -6,6 +6,39 @@
 #ifndef __DTS_IMX8MP_PINFUNC_H
 #define __DTS_IMX8MP_PINFUNC_H
 
+/* Drive Strength */
+#define MX8MP_DSE_X1           0x0
+#define MX8MP_DSE_X2           0x4
+#define MX8MP_DSE_X4           0x2
+#define MX8MP_DSE_X6           0x6
+
+/* Slew Rate */
+#define MX8MP_FSEL_FAST                0x10
+#define MX8MP_FSEL_SLOW                0x0
+
+/* Open Drain */
+#define MX8MP_ODE_ENABLE       0x20
+#define MX8MP_ODE_DISABLE      0x0
+
+#define MX8MP_PULL_DOWN                0x0
+#define MX8MP_PULL_UP          0x40
+
+/* Hysteresis */
+#define MX8MP_HYS_CMOS         0x0
+#define MX8MP_HYS_SCHMITT      0x80
+
+#define MX8MP_PULL_ENABLE      0x100
+#define MX8MP_PULL_DISABLE     0x0
+
+/* SION force input mode */
+#define MX8MP_SION             0x40000000
+
+/* long defaults */
+#define MX8MP_USDHC_DATA_DEFAULT (MX8MP_FSEL_FAST | MX8MP_PULL_UP | \
+                                 MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+#define MX8MP_I2C_DEFAULT (MX8MP_DSE_X6 | MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | \
+                          MX8MP_PULL_ENABLE | MX8MP_SION)
+
 /*
  * The pin function ID is a tuple of
  * <mux_reg conf_reg input_reg mux_mode input_val>