]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
docs/system/or1k: Rename from openrisc
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 5 Feb 2026 03:02:43 +0000 (13:02 +1000)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 9 Feb 2026 19:51:52 +0000 (20:51 +0100)
Also rename docs/system/target-or1k.rst from target-openrisc.rst,
and update all toctree entries to match.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Stafford Horne <shorne@gmail.com>
Message-ID: <20260205030244.266447-6-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
MAINTAINERS
docs/system/or1k/cpu-features.rst [moved from docs/system/openrisc/cpu-features.rst with 100% similarity]
docs/system/or1k/emulation.rst [moved from docs/system/openrisc/emulation.rst with 100% similarity]
docs/system/or1k/or1k-sim.rst [moved from docs/system/openrisc/or1k-sim.rst with 100% similarity]
docs/system/or1k/virt.rst [moved from docs/system/openrisc/virt.rst with 100% similarity]
docs/system/target-or1k.rst [moved from docs/system/target-openrisc.rst with 96% similarity]
docs/system/targets.rst

index 660a0c7846156debbfe67a6147d66c2edfd8a0f1..e973e21709a6430719cbd6db45d6679b5a04ae7c 100644 (file)
@@ -302,7 +302,7 @@ F: tests/tcg/mips/
 OpenRISC TCG CPUs
 M: Stafford Horne <shorne@gmail.com>
 S: Odd Fixes
-F: docs/system/openrisc/cpu-features.rst
+F: docs/system/or1k/cpu-features.rst
 F: target/or1k/
 F: hw/or1k/
 F: include/hw/or1k/
@@ -1493,7 +1493,7 @@ OpenRISC Machines
 or1k-sim
 M: Jia Liu <proljc@gmail.com>
 S: Maintained
-F: docs/system/openrisc/or1k-sim.rst
+F: docs/system/or1k/or1k-sim.rst
 F: hw/intc/ompic.c
 F: hw/or1k/openrisc_sim.c
 F: tests/functional/or1k/test_sim.py
similarity index 96%
rename from docs/system/target-openrisc.rst
rename to docs/system/target-or1k.rst
index 22cb2217a68d0786de3f37a2aed849b8a605a189..b1ee2a34a2ebccc150fa6773bdd94b0126fa21bc 100644 (file)
@@ -55,17 +55,17 @@ Board-specific documentation
 .. toctree::
    :maxdepth: 1
 
-   openrisc/or1k-sim
-   openrisc/virt
+   or1k/or1k-sim
+   or1k/virt
 
 Emulated CPU architecture support
 =================================
 
 .. toctree::
-   openrisc/emulation
+   or1k/emulation
 
 OpenRISC CPU features
 =====================
 
 .. toctree::
-   openrisc/cpu-features
+   or1k/cpu-features
index 38e24188018c24fc6d2232579239f186f33130c0..5b12858b216eab174afe42099f9d0990cf012926 100644 (file)
@@ -21,8 +21,8 @@ Contents:
    target-loongarch
    target-m68k
    target-mips
+   target-or1k
    target-ppc
-   target-openrisc
    target-riscv
    target-rx
    target-s390x