return (data[2] << 16) + (data[1] << 8) + data[0];
}
-static int aquantia_upload_firmware(struct phy_device *phydev)
+static int aquantia_do_upload_firmware(struct phy_device *phydev,
+ const u8 *addr, size_t fw_length)
{
int ret;
- u8 *addr = NULL;
- size_t fw_length = 0;
u16 calculated_crc, read_crc;
char version[VERSION_STRING_SIZE];
u32 primary_offset, iram_offset, iram_size, dram_offset, dram_size;
const struct fw_header *header;
- ret = aquantia_read_fw(&addr, &fw_length);
- if (ret != 0)
- return ret;
+ if (!addr || !fw_length) {
+ printf("%s: Invalid firmware data\n", phydev->dev->name);
+ return -EINVAL;
+ }
- read_crc = (addr[fw_length - 2] << 8) | addr[fw_length - 1];
+ read_crc = (addr[fw_length - 2] << 8) | addr[fw_length - 1];
calculated_crc = crc16_ccitt(0, addr, fw_length - 2);
if (read_crc != calculated_crc) {
printf("%s bad firmware crc: file 0x%04x calculated 0x%04x\n",
phydev->dev->name, read_crc, calculated_crc);
- ret = -EINVAL;
- goto done;
+ return -EINVAL;
}
/* Find the DRAM and IRAM sections within the firmware file. */
ret = aquantia_load_memory(phydev, DRAM_BASE_ADDR, &addr[dram_offset],
dram_size);
if (ret != 0)
- goto done;
+ return ret;
debug("loading iram 0x%08x from offset=%d size=%d\n",
IRAM_BASE_ADDR, iram_offset, iram_size);
ret = aquantia_load_memory(phydev, IRAM_BASE_ADDR, &addr[iram_offset],
iram_size);
if (ret != 0)
- goto done;
+ return ret;
/* make sure soft reset and low power mode are clear */
phy_write(phydev, MDIO_MMD_VEND1, GLOBAL_STANDARD_CONTROL, 0);
phy_write(phydev, MDIO_MMD_VEND1, UP_CONTROL, UP_RUN_STALL_OVERRIDE);
printf("%s firmware loading done.\n", phydev->dev->name);
-done:
+ return 0;
+}
+
+static int aquantia_upload_firmware(struct phy_device *phydev)
+{
+ int ret;
+ u8 *addr = NULL;
+ size_t fw_length = 0;
+
+ ret = aquantia_read_fw(&addr, &fw_length);
+ if (ret != 0)
+ return ret;
+
+ ret = aquantia_do_upload_firmware(phydev, addr, fw_length);
free(addr);
+
return ret;
}
#else