]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
Revert "TODO(drop): aarch64: morello: CPU feature detection for Morello"
authorSzabolcs Nagy <szabolcs.nagy@arm.com>
Fri, 21 Oct 2022 14:41:13 +0000 (15:41 +0100)
committerSzabolcs Nagy <szabolcs.nagy@arm.com>
Wed, 26 Oct 2022 14:39:59 +0000 (15:39 +0100)
This reverts commit 078ebf3e35bd0c50b58dc2ec796530054f69b9a9.

sysdeps/aarch64/multiarch/init-arch.h
sysdeps/unix/sysv/linux/aarch64/cpu-features.c
sysdeps/unix/sysv/linux/aarch64/cpu-features.h

index d5219186be0d5885029ca9f48362a075dab57ee4..a4dcac0019204967c423092e975b27740ad640d3 100644 (file)
@@ -35,6 +35,4 @@
   bool __attribute__((unused)) mte =                                         \
     MTE_ENABLED ();                                                          \
   bool __attribute__((unused)) sve =                                         \
-    GLRO(dl_aarch64_cpu_features).sve;                                       \
-  bool __attribute__((unused)) morello =                                     \
-    GLRO(dl_hwcap2) & HWCAP2_MORELLO;
+    GLRO(dl_aarch64_cpu_features).sve;
index 3d95815d5f0ba2257222b72e3de804870bbf8a48..d14c0f4e1f2905148ac55a4569fd3e12f9a1d7fe 100644 (file)
@@ -126,7 +126,4 @@ init_cpu_features (struct cpu_features *cpu_features)
 
   /* Check if SVE is supported.  */
   cpu_features->sve = GLRO (dl_hwcap) & HWCAP_SVE;
-
-  /* Check if Morello is supported.  */
-  cpu_features->morello = GLRO (dl_hwcap2) & HWCAP2_MORELLO;
 }
index 0742ac140922fb324a1ad729f1c24f27c902a127..391165a99c20adf82f10c5b07d559ab304a893e2 100644 (file)
 #define IS_A64FX(midr) (MIDR_IMPLEMENTOR(midr) == 'F'                        \
                        && MIDR_PARTNUM(midr) == 0x001)
 
-/* TODO: This is based on the Morello Fast Model.
-        Will MIDR_IMPLEMENTOR change to 'A'?  */
-#define IS_MORELLO(midr) (MIDR_IMPLEMENTOR(midr) == 0x3f       \
-                         && MIDR_PARTNUM(midr) == 0x412)
-
 struct cpu_features
 {
   uint64_t midr_el1;
@@ -81,7 +76,6 @@ struct cpu_features
   /* Currently, the GLIBC memory tagging tunable only defines 8 bits.  */
   uint8_t mte_state;
   bool sve;
-  bool morello;
 };
 
 #endif /* _CPU_FEATURES_AARCH64_H  */