for (i = 0; i < def->ncontrollers; i++) {
virDomainControllerDef *cont = def->controllers[i];
if (cont->type == VIR_DOMAIN_CONTROLLER_TYPE_PCI &&
- cont->opts.pciopts.pcihole64) {
+ cont->opts.pciopts.pcihole64 &&
+ (qemuDomainIsQ35(def) || qemuDomainIsI440FX(def))) {
const char *hoststr = NULL;
switch (cont->model) {
qemuBuildMachineACPI(&buf, def, qemuCaps);
+ if (qemuDomainIsARMVirt(def)) {
+ for (i = 0; i < def->ncontrollers; i++) {
+ virDomainControllerDef *cont = def->controllers[i];
+ if (cont->type == VIR_DOMAIN_CONTROLLER_TYPE_PCI &&
+ cont->opts.pciopts.pcihole64) {
+ virBufferAsprintf(&buf, ",highmem-mmio-size=%lluK", cont->opts.pciopts.pcihole64size);
+ break;
+ }
+ }
+ }
+
virCommandAddArgBuffer(cmd, &buf);
return 0;
case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT:
if (pciopts->pcihole64 || pciopts->pcihole64size != 0) {
- if (!qemuDomainIsQ35(def)) {
+ if (!qemuDomainIsQ35(def) &&
+ !(qemuDomainIsARMVirt(def) && virQEMUCapsGet(qemuCaps,
+ QEMU_CAPS_MACHINE_VIRT_HIGHMEM_MMIO_SIZE))) {
virReportError(VIR_ERR_CONFIG_UNSUPPORTED,
_("Setting the 64-bit PCI hole size is not supported for machine '%1$s'"),
def->os.machine);