arm: improve tests for vqsubq*

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_s16.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_s32.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_s8.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_u16.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_u32.c:
	* gcc.target/arm/mve/intrinsics/vqsubq_u8.c:

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
index abcff4f0e3cdd7edc48fe9737d5fa92205ca1622..39b8089919d96ff14eb3db9bcb760b08e2695945 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s16      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vqsubq_m_n_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s16      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
index 23e59ff12a21fc049e7ea0405f6791a97838ca5d..ed6b92ddcf52989e0e475e4146e9152909ba9c47 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s32      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vqsubq_m_n_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s32      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
index d783ab55f650f90e778fff071c2a79b22fbf36bf..c69ed2aeb84b2090ff2b2ddb70e4e6ddf5d5a780 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s8       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vqsubq_m_n_s8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s8       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
index 5244efb340c94a4159c1fa78e12fd7f813849eef..57ba7428befd2df7d05057ad02c85b5c9e39d50c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u16      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vqsubq_m_n_u16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u16      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u16"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u16      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint16x8_t
+foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
+{
+  return vqsubq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
index 4427f87f456e85c7e872f80c7519c142be2a9660..eda9e74309d23e174987703dab59da408243c117 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u32      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vqsubq_m_n_u32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u32      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u32"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u32      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint32x4_t
+foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
+{
+  return vqsubq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
index 0abfa5dc132f381e8b584915437c973d9d0f8363..f6f61b52f52fcf5f3b466a9a3ee5019a494c3757 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u8       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vqsubq_m_n_u8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u8       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u8"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u8       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint8x16_t
+foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
+{
+  return vqsubq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
index faa189f8466ea3830ca83e291e37b9f99895f3cd..1a8ea29e83e55ec51fb653c1c7378959d145edde 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s16      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vqsubq_m_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s16      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
index 62a4dd0979f907a3a68377b77f781c836fb31144..c49b7497f6dde89f160c014a6ba9f156e0bbcc4a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s32      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vqsubq_m_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s32      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
index 71fb6f5632ece48231e5c824ed13afcd9cc38349..17d6471bcd9792095341ec9aebdd21bdba8317ab 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s8       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vqsubq_m_s8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.s8       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
index 68d642dfef502d122237142bf0bda60b087049ed..0ce93fdf9be6bf8d3ff037cc11665b1f80704e6f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u16      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vqsubq_m_u16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u16      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
index 8f76c5f47dad6717d703497d516ee19c5bde6f46..1eac57545b351a5dd0b2505817676a71f56497d0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u32      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vqsubq_m_u32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u32      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
index af335ae9752755cdfb82c746424523ce2e9fee1f..56bdda2da6e034cbb3af541d4653b7427d2dd5b1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u8       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vqsubq_m_u8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqsubt.u8       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vqsubq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqsubt.u8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
index 33a791802899263ea794e56f1f5946c361b63bc3..b9a46f5ff6fad70d7e798e5c914fadd521c2fa99 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.s16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, int16_t b)
 {
   return vqsubq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.s16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
index a2b338839fa929909cf0d6ed2451b9156990c4cf..732e6c01b78bab8e40c4b2befd4b1924a55e4419 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.s32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, int32_t b)
 {
   return vqsubq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.s32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
index e8d7e99d19d5c6253d0efc44450d926dfa431b05..fb3c4404fbab17181dd7b040771e3fe59a68db66 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.s8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, int8_t b)
 {
   return vqsubq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.s8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
index f7b48c546a6377855cdbffd1eba339e9be3c55e2..aa09d1831e06ddd8a0ae6e442bd3fe447d535e8d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
@@ -1,21 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.u16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t a, uint16_t b)
 {
   return vqsubq_n_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.u16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t a, uint16_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u16"  }  } */
+/*
+**foo2:
+**     ...
+**     vqsub.u16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint16x8_t
+foo2 (uint16x8_t a)
+{
+  return vqsubq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
index f74a968f5a7fc2d72eeb65bedd611f6b6ca50858..19b62e3a8a52d862725cec98dcbeb6042ad3ff1d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
@@ -1,21 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.u32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t a, uint32_t b)
 {
   return vqsubq_n_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.u32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t a, uint32_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u32"  }  } */
+/*
+**foo2:
+**     ...
+**     vqsub.u32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint32x4_t
+foo2 (uint32x4_t a)
+{
+  return vqsubq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
index ce7b4ce0151d1457a0eba98740764772bfe00489..c8eeb38b266291bbcf71084ca6b04786cc3b21ec 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
@@ -1,21 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.u8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t a, uint8_t b)
 {
   return vqsubq_n_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.u8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t a, uint8_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u8"  }  } */
+/*
+**foo2:
+**     ...
+**     vqsub.u8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint8x16_t
+foo2 (uint8x16_t a)
+{
+  return vqsubq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
index 85bf265eeb06cb0c14f876723c21d621d0906268..6c66b4d75d8100ce586caf79ccc2d6f6a87d1185 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.s16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vqsubq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.s16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
index 35d17e8bc4e17a45803376e53048257d8b5c2443..8432197b9e89748acd55e1e141d496beedb8facd 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.s32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vqsubq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.s32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
index 50cfccff7a5cfa7090182e88e9f221339b206c69..ad16cae08bcb37eb643a7d958aa2b51d848c2fcd 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.s8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vqsubq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.s8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
index 15f0b7244b7b6456d4955632779495d0965779bf..264df1a03988fd0e1380fca2ca69152f232e366b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.u16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t a, uint16x8_t b)
 {
   return vqsubq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.u16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t a, uint16x8_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
index 7d695e2347434bab116a6edd839541b93047e636..a4bf15cd9df0fa6637d65c64586a8dc533214ded 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.u32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t a, uint32x4_t b)
 {
   return vqsubq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.u32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t a, uint32x4_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
index c0552d100d4b12988e344c5c6116896ea0f041f3..1804d6484e26ad81b59838db95584d7c1a174b9c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqsub.u8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t a, uint8x16_t b)
 {
   return vqsubq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqsub.u8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t a, uint8x16_t b)
 {
   return vqsubq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqsub.u8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file