net: phy: realtek: add RTL8224 pair order support

The RTL8224 has a register to configure a pair swap (from ABCD order to
DCBA) providing PCB designers more flexbility when wiring the chip. The
swap parameter has to be set correctly for each of the 4 ports before
the chip can detect a link.

After a reset, this register is (unfortunately) left in a random state,
thus it has to be initialized. On most of the devices the bootloader
does it once for all and we can rely on the value set, on some other it
is not and the kernel has to do it.

The MDI pair swap can be set in the device tree using the property
enet-phy-pair-order. The property is set to 0 to keep the default order
(ABCD), or 1 to reverse the pairs (DCBA).

Signed-off-by: Damien Dejean <dam.dejean@gmail.com>
Link: https://patch.msgid.link/20260318215502.106528-3-dam.dejean@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/phy/realtek/Kconfig b/drivers/net/phy/realtek/Kconfig
index b05c2a1e90243634464b2b1bc10886d0690e1ecc..a741b34d193edadafa9f38d63239ad5adefb702f 100644 (file)
--- a/drivers/net/phy/realtek/Kconfig
+++ b/drivers/net/phy/realtek/Kconfig
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 config REALTEK_PHY
        tristate "Realtek PHYs"
+       select PHY_PACKAGE
        help
          Currently supports RTL821x/RTL822x and fast ethernet PHYs
 

diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index 530b4e26d16ef00833d06c4e23b99c9cfcddfcef..63134e300c3339de95873bb93341630362b403e3 100644 (file)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -171,6 +171,8 @@
 
 #define RTL8224_SRAM_RTCT_LEN(pair)            (0x8028 + (pair) * 4)
 
+#define RTL8224_VND1_MDI_PAIR_SWAP             0xa90
+
 #define RTL8366RB_POWER_SAVE                   0x15
 #define RTL8366RB_POWER_SAVE_ON                        BIT(12)
 
@@ -1820,6 +1822,66 @@ static int rtl8224_cable_test_get_status(struct phy_device *phydev, bool *finish
        return rtl8224_cable_test_report(phydev, finished);
 }
 
+static int rtl8224_package_modify_mmd(struct phy_device *phydev, int devad,
+                                     u32 regnum, u16 mask, u16 set)
+{
+       int val, ret;
+
+       phy_lock_mdio_bus(phydev);
+
+       val = __phy_package_read_mmd(phydev, 0, devad, regnum);
+       if (val < 0) {
+               ret = val;
+               goto exit;
+       }
+
+       val &= ~mask;
+       val |= set;
+
+       ret = __phy_package_write_mmd(phydev, 0, devad, regnum, val);
+
+exit:
+       phy_unlock_mdio_bus(phydev);
+       return ret;
+}
+
+static int rtl8224_mdi_config_order(struct phy_device *phydev)
+{
+       struct device_node *np = phydev->mdio.dev.of_node;
+       u8 port_offset = phydev->mdio.addr & 3;
+       u32 order = 0;
+       int ret;
+
+       ret = of_property_read_u32(np, "enet-phy-pair-order", &order);
+
+       /* Do nothing in case the property is not present */
+       if (ret == -EINVAL || ret == -ENOSYS)
+               return 0;
+
+       if (ret)
+               return ret;
+
+       if (order & ~1)
+               return -EINVAL;
+
+       return rtl8224_package_modify_mmd(phydev, MDIO_MMD_VEND1,
+                                         RTL8224_VND1_MDI_PAIR_SWAP,
+                                         BIT(port_offset),
+                                         order ? BIT(port_offset) : 0);
+}
+
+static int rtl8224_config_init(struct phy_device *phydev)
+{
+       return rtl8224_mdi_config_order(phydev);
+}
+
+static int rtl8224_probe(struct phy_device *phydev)
+{
+       /* Chip exposes 4 ports, join all of them in the same package */
+       return devm_phy_package_join(&phydev->mdio.dev, phydev,
+                                    phydev->mdio.addr & ~3, 0);
+}
+
 static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
 {
        int val;
@@ -2395,6 +2457,8 @@ static struct phy_driver realtek_drvs[] = {
                PHY_ID_MATCH_EXACT(0x001ccad0),
                .name           = "RTL8224 2.5Gbps PHY",
                .flags          = PHY_POLL_CABLE_TEST,
+               .probe          = rtl8224_probe,
+               .config_init    = rtl8224_config_init,
                .get_features   = rtl822x_c45_get_features,
                .config_aneg    = rtl822x_c45_config_aneg,
                .read_status    = rtl822x_c45_read_status,