return ret;
}
+
+static u32 aie2_get_context_priority(struct amdxdna_dev_hdl *ndev,
+ struct amdxdna_hwctx *hwctx)
+{
+ if (!AIE2_FEATURE_ON(ndev, AIE2_PREEMPT))
+ return PRIORITY_HIGH;
+
+ switch (hwctx->qos.priority) {
+ case AMDXDNA_QOS_REALTIME_PRIORITY:
+ return PRIORITY_REALTIME;
+ case AMDXDNA_QOS_HIGH_PRIORITY:
+ return PRIORITY_HIGH;
+ case AMDXDNA_QOS_NORMAL_PRIORITY:
+ return PRIORITY_NORMAL;
+ case AMDXDNA_QOS_LOW_PRIORITY:
+ return PRIORITY_LOW;
+ default:
+ return PRIORITY_HIGH;
+ }
+}
+
int aie2_create_context(struct amdxdna_dev_hdl *ndev, struct amdxdna_hwctx *hwctx)
{
DECLARE_AIE2_MSG(create_ctx, MSG_OP_CREATE_CONTEXT);
req.num_unused_col = hwctx->num_unused_col;
req.num_cq_pairs_requested = 1;
req.pasid = hwctx->client->pasid;
- req.context_priority = 2;
+ req.context_priority = aie2_get_context_priority(ndev, hwctx);
ret = aie2_send_mgmt_msg_wait(ndev, &msg);
if (ret)
#define AMDXDNA_INVALID_BO_HANDLE 0
#define AMDXDNA_INVALID_FENCE_HANDLE 0
+/*
+ * Define hardware context priority
+ */
+#define AMDXDNA_QOS_REALTIME_PRIORITY 0x100
+#define AMDXDNA_QOS_HIGH_PRIORITY 0x180
+#define AMDXDNA_QOS_NORMAL_PRIORITY 0x200
+#define AMDXDNA_QOS_LOW_PRIORITY 0x280
+
enum amdxdna_device_type {
AMDXDNA_DEV_TYPE_UNKNOWN = -1,
AMDXDNA_DEV_TYPE_KMQ,