+2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/96373
+ * tree.h (sign_mask_for): Declare.
+ * tree.cc (sign_mask_for): New function.
+ (signed_or_unsigned_type_for): For vector types, try to use the
+ related_int_vector_mode.
+ * genmatch.cc (commutative_op): Handle conditional internal functions.
+ * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
+
+2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
+
+ * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
+ Use the likely minimum VF when bounding the denominators to
+ the estimated number of iterations.
+
+2023-01-27 Richard Biener <rguenther@suse.de>
+
+ PR target/55522
+ * doc/invoke.texi (-shared): Clarify effect on -ffast-math
+ and -Ofast FP environment side-effects.
+
+2023-01-27 Richard Biener <rguenther@suse.de>
+
+ PR target/55522
+ * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
+ Don't add crtfastmath.o for -shared.
+
+2023-01-27 Richard Biener <rguenther@suse.de>
+
+ PR target/55522
+ * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
+ for -shared.
+
+2023-01-27 Richard Biener <rguenther@suse.de>
+
+ PR target/55522
+ * config/alpha/linux.h (ENDFILE_SPEC): Don't add
+ crtfastmath.o for -shared.
+
+2023-01-27 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/108306
+ * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
+ varying for shifts that are always out of void range.
+ (operator_rshift::fold_range): Return [0, 0] not
+ varying for shifts that are always out of void range.
+
+2023-01-27 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/108447
+ * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
+ Do not attempt to fold HONOR_NAN types.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
+ Remove _m suffix for "vop_m" C++ overloaded API name.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
+ * config/riscv/riscv-vector-builtins-bases.h: Ditto.
+ * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
+ (vsm): Ditto.
+ * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
+ * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
+ (vbool64_t): Ditto.
+ (vbool32_t): Ditto.
+ (vbool16_t): Ditto.
+ (vbool8_t): Ditto.
+ (vbool4_t): Ditto.
+ (vbool2_t): Ditto.
+ (vbool1_t): Ditto.
+ * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
+ (rvv_arg_type_info::get_tree_type): Ditto.
+ (function_expander::use_contiguous_load_insn): Ditto.
+ * config/riscv/vector.md (@pred_store<mode>): Ditto.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
+ (vsetvl_discard_result_insn_p): New function.
+ (reg_killed_by_bb_p): rename to find_reg_killed_by.
+ (find_reg_killed_by): New name.
+ (get_vl): allow it to be called by more functions.
+ (has_vsetvl_killed_avl_p): Add condition.
+ (get_avl): allow it to be called by more functions.
+ (insn_should_be_added_p): New function.
+ (get_all_nonphi_defs): Refine function.
+ (get_all_sets): Ditto.
+ (get_same_bb_set): New function.
+ (any_insn_in_bb_p): Ditto.
+ (any_set_in_bb_p): Ditto.
+ (get_vl_vtype_info): Add VLMAX forward optimization.
+ (source_equal_p): Fix issues.
+ (extract_single_source): Refine.
+ (avl_info::multiple_source_equal_p): New function.
+ (avl_info::operator==): Adjust for final version.
+ (vl_vtype_info::operator==): Ditto.
+ (vl_vtype_info::same_avl_p): Ditto.
+ (vector_insn_info::parse_insn): Ditto.
+ (vector_insn_info::available_p): New function.
+ (vector_insn_info::merge): Adjust for final version.
+ (vector_insn_info::dump): Add hard_empty.
+ (pass_vsetvl::hard_empty_block_p): New function.
+ (pass_vsetvl::backward_demand_fusion): Adjust for final version.
+ (pass_vsetvl::forward_demand_fusion): Ditto.
+ (pass_vsetvl::demand_fusion): Ditto.
+ (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
+ (pass_vsetvl::compute_local_properties): Adjust for final version.
+ (pass_vsetvl::can_refine_vsetvl_p): Ditto.
+ (pass_vsetvl::refine_vsetvls): Ditto.
+ (pass_vsetvl::commit_vsetvls): Ditto.
+ (pass_vsetvl::propagate_avl): New function.
+ (pass_vsetvl::lazy_vsetvl): Adjust for new version.
+ * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
+
+2023-01-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR other/108560
+ * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
+ from size_t to int.
+
+2023-01-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR ipa/106061
+ * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
+ redirection of calls to __builtin_trap in addition to redirection
+ to __builtin_unreachable.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
+ (emit_vsetvl_insn): Ditto.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/vector.md: Fix constraints.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
+
+2023-01-27 Patrick Palka <ppalka@redhat.com>
+ Jakub Jelinek <jakub@redhat.com>
+
+ * tree-core.h (tree_code_type, tree_code_length): For
+ C++17 and later, add inline keyword, otherwise don't define
+ the arrays, but declare extern arrays.
+ * tree.cc (tree_code_type, tree_code_length): Define these
+ arrays for C++14 and older.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-vsetvl.h: Change it into public.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
+ pass.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/vector.md: Fix incorrect attributes.
+
+2023-01-27 Richard Biener <rguenther@suse.de>
+
+ PR target/55522
+ * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
+ Don't add crtfastmath.o for -shared.
+
+2023-01-27 Alexandre Oliva <oliva@gnu.org>
+
+ * doc/options.texi (option, RejectNegative): Mention that
+ -g-started options are also implicitly negatable.
+
2023-01-26 Kito Cheng <kito.cheng@sifive.com>
* config/riscv/riscv-vector-builtins.cc (register_builtin_types):
+2023-01-27 Gaius Mulley <gaiusmod2@gmail.com>
+
+ * gm2/pim/fail/empty.mod: New test.
+
+2023-01-27 Joseph Myers <joseph@codesourcery.com>
+
+ * gcc.dg/c2x-auto-1.c, gcc.dg/c2x-auto-3.c: Expect braces around
+ auto initializers to be disallowed.
+
+2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.dg/vect/complex/fast-math-bb-slp-complex-add-pattern-half-float.c:
+ Remove XFAIL.
+ * gcc.dg/vect/complex/fast-math-complex-add-half-float.c: Fix names
+ of dump files.
+
+2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/simd/vfma_f64.c: Use a wrapper function
+ rather than an asm barrier.
+ * gcc.target/aarch64/simd/vfms_f64.c: Likewise.
+ * gcc.target/aarch64/simd/vmul_f64_1.c: Use a wrapper function
+ rather than volatile.
+ * gcc.target/aarch64/simd/vmul_n_f64_1.c: Likewise.
+ * gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c: Use a wrapper
+ function. Remove -fno-inline.
+ * gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c: Likewise.
+ * gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c: Likewise.
+ * gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c: Likewise.
+ * gcc.target/aarch64/simd/vqdmulhh_lane_s16.c: Likewise.
+ * gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c: Likewise.
+ * gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c: Likewise.
+ * gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c: Likewise.
+ * gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c: Likewise.
+ * gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c: Likewise.
+ * gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c: Likewise.
+ * gcc.target/aarch64/simd/vqdmulhs_lane_s32.c: Likewise.
+ Allow the scalar form to be used when operating on lane 0.
+ Add a test for lane 1.
+
+2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/96373
+ * gcc.target/aarch64/sve/cond_xorsign_1.c: New test.
+ * gcc.target/aarch64/sve/cond_xorsign_2.c: Likewise.
+
+2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve/cond_asrd_1.c: Tune for a 256-bit
+ vector length.
+ * gcc.target/aarch64/sve/cond_cnot_4.c: Likewise.
+ * gcc.target/aarch64/sve/cond_cnot_6.c: Likewise.
+ * gcc.target/aarch64/sve/cond_unary_5.c: Likewise.
+ * gcc.target/aarch64/sve/cond_unary_6.c: Likewise.
+ * gcc.target/aarch64/sve/cond_uxt_5.c: Likewise.
+ * gcc.target/aarch64/sve/vcond_4_costly.c: Remove XFAILs.
+
+2023-01-27 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/108306
+ * gcc.dg/pr108306.c: New.
+
+2023-01-27 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/108447
+ * gcc.dg/pr108447.c: New.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: Fix testcase check.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-18.c: Ditto.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * g++.target/riscv/rvv/base/vle-1.C: New test.
+ * g++.target/riscv/rvv/base/vle_tu-1.C: New test.
+ * g++.target/riscv/rvv/base/vle_tum-1.C: New test.
+ * g++.target/riscv/rvv/base/vle_tumu-1.C: New test.
+ * g++.target/riscv/rvv/base/vse-1.C: New test.
+ * g++.target/riscv/rvv/base/riscv_vector.h: New.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * gcc.target/riscv/rvv/base/vse-1.c: New test.
+ * gcc.target/riscv/rvv/base/vse-2.c: New test.
+ * gcc.target/riscv/rvv/base/vse-3.c: New test.
+ * gcc.target/riscv/rvv/base/vse_m-1.c: New test.
+ * gcc.target/riscv/rvv/base/vse_m-2.c: New test.
+ * gcc.target/riscv/rvv/base/vse_m-3.c: New test.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * gcc.target/riscv/rvv/base/vle-1.c: New test.
+ * gcc.target/riscv/rvv/base/vle-2.c: New test.
+ * gcc.target/riscv/rvv/base/vle-3.c: New test.
+ * gcc.target/riscv/rvv/base/vle_m-1.c: New test.
+ * gcc.target/riscv/rvv/base/vle_m-2.c: New test.
+ * gcc.target/riscv/rvv/base/vle_m-3.c: New test.
+ * gcc.target/riscv/rvv/base/vle_mu-1.c: New test.
+ * gcc.target/riscv/rvv/base/vle_mu-2.c: New test.
+ * gcc.target/riscv/rvv/base/vle_mu-3.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tu-1.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tu-2.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tu-3.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tum-1.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tum-2.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tum-3.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tumu-1.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tumu-2.c: New test.
+ * gcc.target/riscv/rvv/base/vle_tumu-3.c: New test.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * g++.target/riscv/rvv/base/vsm-1.C: New test.
+ * g++.target/riscv/rvv/rvv.exp: New test.
+ * gcc.target/riscv/rvv/base/vlm_vsm-1.c: New test.
+ * gcc.target/riscv/rvv/base/vlm_vsm-2.c: New test.
+ * gcc.target/riscv/rvv/base/vlm_vsm-3.c: New test.
+
+2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+
+ * gcc.target/riscv/rvv/vsetvl/avl_single-14.c: Adjust for final implementation.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-23.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-30.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-44.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-47.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-50.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-51.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-65.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-66.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-67.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-68.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-70.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-71.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-9.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-73.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-74.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-75.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-1.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-10.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-11.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-12.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-13.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-14.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-15.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-16.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-17.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-18.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-19.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-2.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-20.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-3.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-4.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-5.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-6.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-7.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-8.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-9.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c: New test.
+
+2023-01-27 Xi Ruoyao <xry111@xry111.site>
+
+ * gcc.dg/pr95115.c (x): Add noipa attribute.
+
+2023-01-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR ipa/106061
+ * gcc.dg/pr106061.c: New test.
+
+2023-01-27 Tobias Burnus <tobias@codesourcery.com>
+
+ * gfortran.dg/gomp/declare-variant-10.f90: Update scan-tree's
+ target selector to handle Windows.
+ * gfortran.dg/gomp/declare-variant-11.f90: Likewise.
+ * gfortran.dg/gomp/declare-variant-12.f90: Likewise.
+
2023-01-26 Gaius Mulley <gaiusmod2@gmail.com>
* gm2/warnings/returntype/fail/badreturn.mod: New test.