arm64: dts: st: add timer nodes on stm32mp251

Add timers support on STM32MP25 SoC. Use dedicated compatible to handle
new features and instances introduced with this SoC. STM32MP25 SoC has
various timer flavours, each group has its own specific feature list:
- Advanced-control timers (TIM1/TIM8/TIM20)
- General-purpose timers (TIM2/TIM3/TIM4/TIM5)
- Basic timers (TIM6/TIM7)
- General-purpose timers (TIM10/TIM11/TIM12/TIM13/TIM14)
- General purpose timers (TIM15/TIM16/TIM17)

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-7-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 8d87865850a7a6e8095c36acdef83c8e3a73ae54..30372ec100a40d474fc112911e3160f4bd7611f4 100644 (file)
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -291,6 +291,273 @@
                        #access-controller-cells = <1>;
                        ranges;
 
+                       timers2: timer@40000000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40000000 0x400>;
+                               interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM2>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 1>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@1 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <1>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers3: timer@40010000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40010000 0x400>;
+                               interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM3>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 2>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@2 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <2>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers4: timer@40020000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40020000 0x400>;
+                               interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM4>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 3>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@3 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <3>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers5: timer@40030000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40030000 0x400>;
+                               interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM5>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 4>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@4 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <4>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers6: timer@40040000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40040000 0x400>;
+                               interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM6>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 5>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               timer@5 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <5>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers7: timer@40050000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40050000 0x400>;
+                               interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM7>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 6>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               timer@6 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <6>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers12: timer@40060000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40060000 0x400>;
+                               interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM12>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 10>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@11 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <11>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers13: timer@40070000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40070000 0x400>;
+                               interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM13>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 11>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@12 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <12>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers14: timer@40080000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40080000 0x400>;
+                               interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM14>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 12>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@13 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <13>;
+                                       status = "disabled";
+                               };
+                       };
+
                        lptimer1: timer@40090000 {
                                compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
                                reg = <0x40090000 0x400>;
@@ -597,6 +864,136 @@
                                status = "disabled";
                        };
 
+                       timers10: timer@401c0000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x401c0000 0x400>;
+                               interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM10>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 8>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@9 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <9>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers11: timer@401d0000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x401d0000 0x400>;
+                               interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM11>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 9>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@10 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <10>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers1: timer@40200000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40200000 0x400>;
+                               interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "brk", "up", "trg-com", "cc";
+                               clocks = <&rcc CK_KER_TIM1>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 0>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@0 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <0>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers8: timer@40210000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40210000 0x400>;
+                               interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "brk", "up", "trg-com", "cc";
+                               clocks = <&rcc CK_KER_TIM8>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 7>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@7 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <7>;
+                                       status = "disabled";
+                               };
+                       };
+
                        usart6: serial@40220000 {
                                compatible = "st,stm32h7-uart";
                                reg = <0x40220000 0x400>;
@@ -654,6 +1051,99 @@
                                status = "disabled";
                        };
 
+                       timers15: timer@40250000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40250000 0x400>;
+                               interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM15>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 13>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@14 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <14>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers16: timer@40260000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40260000 0x400>;
+                               interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM16>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 14>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@15 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <15>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       timers17: timer@40270000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40270000 0x400>;
+                               interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "global";
+                               clocks = <&rcc CK_KER_TIM17>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 15>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@16 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <16>;
+                                       status = "disabled";
+                               };
+                       };
+
                        spi5: spi@40280000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
@@ -783,6 +1273,40 @@
                                status = "disabled";
                        };
 
+                       timers20: timer@40320000 {
+                               compatible = "st,stm32mp25-timers";
+                               reg = <0x40320000 0x400>;
+                               interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "brk", "up", "trg-com", "cc";
+                               clocks = <&rcc CK_KER_TIM20>;
+                               clock-names = "int";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               access-controllers = <&rifsc 16>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+
+                               counter {
+                                       compatible = "st,stm32mp25-timer-counter";
+                                       status = "disabled";
+                               };
+
+                               pwm {
+                                       compatible = "st,stm32mp25-pwm";
+                                       #pwm-cells = <3>;
+                                       status = "disabled";
+                               };
+
+                               timer@19 {
+                                       compatible = "st,stm32mp25-timer-trigger";
+                                       reg = <19>;
+                                       status = "disabled";
+                               };
+                       };
+
                        usart1: serial@40330000 {
                                compatible = "st,stm32h7-uart";
                                reg = <0x40330000 0x400>;