configs: phycore_am6xx_a53_defconfig: Enable CMD_DDR4

Enable command for verifying DDRSS inline ECC features.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>

diff --git a/configs/phycore_am62ax_a53_defconfig b/configs/phycore_am62ax_a53_defconfig
index ab50545d307684ce5b22c8061fd4909d867043f2..a0423b807217c6f82e19a3db8fcb5d2aee149cc8 100644 (file)
--- a/configs/phycore_am62ax_a53_defconfig
+++ b/configs/phycore_am62ax_a53_defconfig
@@ -78,6 +78,7 @@ CONFIG_CMD_WDT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_RTC=y
+CONFIG_CMD_DDR4=y
 CONFIG_CMD_SMC=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y

diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig
index fa5c44667914e0a9952fb5a6a7204cade2d03435..afed0bfafc6d430b104b75ef95fde1af0774b757 100644 (file)
--- a/configs/phycore_am62x_a53_defconfig
+++ b/configs/phycore_am62x_a53_defconfig
@@ -80,6 +80,7 @@ CONFIG_CMD_WDT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_RTC=y
+CONFIG_CMD_DDR4=y
 CONFIG_CMD_SMC=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y

diff --git a/configs/phycore_am64x_a53_defconfig b/configs/phycore_am64x_a53_defconfig
index fcf61590c60bb4f99b13b18223a2ad5c83d91251..d0b33661cf62c963651804a57897118a8757a062 100644 (file)
--- a/configs/phycore_am64x_a53_defconfig
+++ b/configs/phycore_am64x_a53_defconfig
@@ -80,6 +80,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_RTC=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_DDR4=y
 CONFIG_CMD_SMC=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y