arm64: dts: imx8-ss-dma: add #address-cells and #size-cells to LPI2C nodes

These properties are required by i2c-controller.yaml bindings.
Add them on SoC level, rather than on board level.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index f7a91d43a0ffe10e85e2b1e71ff6751c314b6ef7..3f521441faf7e473f8b95750b1ac17384c0af14b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -303,6 +303,8 @@ dma_subsys: bus@5a000000 {
 
        i2c0: i2c@5a800000 {
                reg = <0x5a800000 0x4000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
                         <&i2c0_lpcg IMX_LPCG_CLK_4>;
@@ -315,6 +317,8 @@ dma_subsys: bus@5a000000 {
 
        i2c1: i2c@5a810000 {
                reg = <0x5a810000 0x4000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
                         <&i2c1_lpcg IMX_LPCG_CLK_4>;
@@ -327,6 +331,8 @@ dma_subsys: bus@5a000000 {
 
        i2c2: i2c@5a820000 {
                reg = <0x5a820000 0x4000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
                         <&i2c2_lpcg IMX_LPCG_CLK_4>;
@@ -339,6 +345,8 @@ dma_subsys: bus@5a000000 {
 
        i2c3: i2c@5a830000 {
                reg = <0x5a830000 0x4000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
                         <&i2c3_lpcg IMX_LPCG_CLK_4>;