]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: rockchip: Use "dma-noncoherent" in base RK3588 SoC dtsi
authorDragan Simic <dsimic@manjaro.org>
Wed, 8 Jan 2025 04:26:45 +0000 (05:26 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 3 Feb 2025 08:14:13 +0000 (09:14 +0100)
The preferred way to denote hardware with non-coherent DMA is to use the
"dma-noncoherent" DT property, at both the GIC redistributor and the GIC ITS
levels, [1] instead of relying on the compatibles to handle hardware errata,
in this case the Rockchip 3588001 errata. [2]

Let's have the preferred way employed in the base Rockchip RK3588 SoC dtsi,
which also goes along with adding initial support for the Rockchip RK3582 SoC
variant, with its separate compatible. [2][3]

[1] Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
[2] https://lore.kernel.org/linux-rockchip/86msgoozqa.wl-maz@kernel.org/
[3] https://lore.kernel.org/linux-rockchip/20241222030355.2246-4-naoki@radxa.com/

Cc: Marc Zyngier <maz@kernel.org>
Cc: FUKAUMI Naoki <naoki@radxa.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/fa1a672dae3644bb3caa58f03216d0ca349db88b.1736279094.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi

index 8cfa30837ce72581d0b513a8274ab0177eb5ae15..574bc4497d1320ff42b9bad856067d5d0f521c18 100644 (file)
                      <0x0 0xfe680000 0 0x100000>; /* GICR */
                interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-controller;
+               dma-noncoherent;
                mbi-alias = <0x0 0xfe610000>;
                mbi-ranges = <424 56>;
                msi-controller;
                its0: msi-controller@fe640000 {
                        compatible = "arm,gic-v3-its";
                        reg = <0x0 0xfe640000 0x0 0x20000>;
+                       dma-noncoherent;
                        msi-controller;
                        #msi-cells = <1>;
                };
                its1: msi-controller@fe660000 {
                        compatible = "arm,gic-v3-its";
                        reg = <0x0 0xfe660000 0x0 0x20000>;
+                       dma-noncoherent;
                        msi-controller;
                        #msi-cells = <1>;
                };