riscv: dts: sophgo: Move all soc specific device into soc dtsi file

Although the cv1800b/cv1812h/sg2000/sg2002 share most peripherals,
some basic peripherals, like clock, pinctrl, clint and plint, are
not shared. These are caused by not only historical reason (plic,
clint), but also the fact the device is not the same (clock, pinctrl).

It is good to override device compatible when the SoC number is small,
but now it is a burden for maintenance, and it is kind of annoyed to
explain why using override. So it is time to move this out of the
common peripheral header.

Move all soc related peripheral device from common peripheral header
to the soc specific header to get rid of most compatible override.

Reviewed-by: Yixun Lan <dlan@gentoo.org>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250430012654.235830-2-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index aa1f5df100f0743a923269d48ab142a2cf433719..fc9e6b56790fc78429c1a70b8bcc8c66e6c12329 100644 (file)
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -15,23 +15,37 @@
        };
 
        soc {
+               interrupt-parent = <&plic>;
+               dma-noncoherent;
+
                pinctrl: pinctrl@3001000 {
                        compatible = "sophgo,cv1800b-pinctrl";
                        reg = <0x03001000 0x1000>,
                              <0x05027000 0x1000>;
                        reg-names = "sys", "rtc";
                };
-       };
-};
 
-&plic {
-       compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
-};
+               clk: clock-controller@3002000 {
+                       compatible = "sophgo,cv1800-clk";
+                       reg = <0x03002000 0x1000>;
+                       clocks = <&osc>;
+                       #clock-cells = <1>;
+               };
 
-&clint {
-       compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
-};
+               plic: interrupt-controller@70000000 {
+                       compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
+                       reg = <0x70000000 0x4000000>;
+                       interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
+                       interrupt-controller;
+                       #address-cells = <0>;
+                       #interrupt-cells = <2>;
+                       riscv,ndev = <101>;
+               };
 
-&clk {
-       compatible = "sophgo,cv1800-clk";
+               clint: timer@74000000 {
+                       compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
+                       reg = <0x74000000 0x10000>;
+                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
+               };
+       };
 };

diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
index 8a1b95c5116bf60eb3082c80b114acb17fc48257..fcea4376fb79c33ad4216aeb0bc007b50e18f158 100644 (file)
--- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
@@ -17,23 +17,37 @@
        };
 
        soc {
+               interrupt-parent = <&plic>;
+               dma-noncoherent;
+
                pinctrl: pinctrl@3001000 {
                        compatible = "sophgo,cv1812h-pinctrl";
                        reg = <0x03001000 0x1000>,
                              <0x05027000 0x1000>;
                        reg-names = "sys", "rtc";
                };
-       };
-};
 
-&plic {
-       compatible = "sophgo,cv1812h-plic", "thead,c900-plic";
-};
+               clk: clock-controller@3002000 {
+                       compatible = "sophgo,cv1810-clk";
+                       reg = <0x03002000 0x1000>;
+                       clocks = <&osc>;
+                       #clock-cells = <1>;
+               };
 
-&clint {
-       compatible = "sophgo,cv1812h-clint", "thead,c900-clint";
-};
+               plic: interrupt-controller@70000000 {
+                       compatible = "sophgo,cv1812h-plic", "thead,c900-plic";
+                       reg = <0x70000000 0x4000000>;
+                       interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
+                       interrupt-controller;
+                       #address-cells = <0>;
+                       #interrupt-cells = <2>;
+                       riscv,ndev = <101>;
+               };
 
-&clk {
-       compatible = "sophgo,cv1810-clk";
+               clint: timer@74000000 {
+                       compatible = "sophgo,cv1812h-clint", "thead,c900-clint";
+                       reg = <0x74000000 0x10000>;
+                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
+               };
+       };
 };

diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index 58cd546392e056a3bbdf9c27a73c050de1060fba..a1129533576a7325383cb7eeace254fc90a07b99 100644 (file)
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -49,18 +49,10 @@
 
        soc {
                compatible = "simple-bus";
-               interrupt-parent = <&plic>;
                #address-cells = <1>;
                #size-cells = <1>;
-               dma-noncoherent;
                ranges;
 
-               clk: clock-controller@3002000 {
-                       reg = <0x03002000 0x1000>;
-                       clocks = <&osc>;
-                       #clock-cells = <1>;
-               };
-
                gpio0: gpio@3020000 {
                        compatible = "snps,dw-apb-gpio";
                        reg = <0x3020000 0x1000>;
@@ -344,19 +336,5 @@
                        snps,data-width = <2>;
                        status = "disabled";
                };
-
-               plic: interrupt-controller@70000000 {
-                       reg = <0x70000000 0x4000000>;
-                       interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
-                       interrupt-controller;
-                       #address-cells = <0>;
-                       #interrupt-cells = <2>;
-                       riscv,ndev = <101>;
-               };
-
-               clint: timer@74000000 {
-                       reg = <0x74000000 0x10000>;
-                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
-               };
        };
 };

diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
index 7f79de33163c86d7000916ac4f1a406673ad482b..df133831bd3e2985b7a6e22aafd47e53f4925f88 100644 (file)
--- a/arch/riscv/boot/dts/sophgo/sg2002.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
@@ -17,25 +17,39 @@
        };
 
        soc {
+               interrupt-parent = <&plic>;
+               dma-noncoherent;
+
                pinctrl: pinctrl@3001000 {
                        compatible = "sophgo,sg2002-pinctrl";
                        reg = <0x03001000 0x1000>,
                              <0x05027000 0x1000>;
                        reg-names = "sys", "rtc";
                };
-       };
-};
 
-&plic {
-       compatible = "sophgo,sg2002-plic", "thead,c900-plic";
-};
+               clk: clock-controller@3002000 {
+                       compatible = "sophgo,sg2000-clk";
+                       reg = <0x03002000 0x1000>;
+                       clocks = <&osc>;
+                       #clock-cells = <1>;
+               };
 
-&clint {
-       compatible = "sophgo,sg2002-clint", "thead,c900-clint";
-};
+               plic: interrupt-controller@70000000 {
+                       compatible = "sophgo,sg2002-plic", "thead,c900-plic";
+                       reg = <0x70000000 0x4000000>;
+                       interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
+                       interrupt-controller;
+                       #address-cells = <0>;
+                       #interrupt-cells = <2>;
+                       riscv,ndev = <101>;
+               };
 
-&clk {
-       compatible = "sophgo,sg2000-clk";
+               clint: timer@74000000 {
+                       compatible = "sophgo,sg2002-clint", "thead,c900-clint";
+                       reg = <0x74000000 0x10000>;
+                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
+               };
+       };
 };
 
 &sdhci0 {