Prevent Altivec and VSX insns on PowerPC64 when no FPRs or VRs are avail.

diff --git a/ChangeLog b/ChangeLog
index ee2ccdc4f42c5743aa70778fa37f79f3a0b7603e..6da276198951b3759a250cc0964334a4e2fe7a0a 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2011-05-18  Ryan S. Arnold  <rsa@us.ibm.com>
+
+       * sysdeps/powerpc/powerpc64/Makefile (no-special-regs): Add -mno-vsx
+       and -mno-altivec to prevent the compiler from using Altivec and/or
+       VSX instructions when the corresponding registers are not available.
+
 2011-08-18  David Flaherty  <flaherty@linux.vnet.ibm.com>
 
        * sysdeps/ieee754/ldbl-128ibm/s_fmal.c: New file which checks

diff --git a/sysdeps/powerpc/powerpc64/Makefile b/sysdeps/powerpc/powerpc64/Makefile
index c7cc601ec4c9780dc9df946dd89c5e4347ed70f4..9056e60c4e975322e5b60abd76b86280c9113ff2 100644 (file)
--- a/sysdeps/powerpc/powerpc64/Makefile
+++ b/sysdeps/powerpc/powerpc64/Makefile
@@ -12,7 +12,10 @@ endif
 
 # These flags prevent FPU or Altivec registers from being used,
 # for code called in contexts that is not allowed to touch those registers.
-# Stupid GCC requires us to pass all these ridiculous switches.
+# Stupid GCC requires us to pass all these ridiculous switches.  We need to
+# pass the -mno-* switches as well to prevent the compiler from attempting
+# to emit altivec or vsx instructions, especially when the registers aren't
+# available.
 no-special-regs := $(sort $(foreach n,40 41 50 51 60 61 62 63 \
                                      $(foreach m,2 3 4 5 6 7 8 9, \
                                                  3$m 4$m 5$m),\
@@ -20,7 +23,7 @@ no-special-regs := $(sort $(foreach n,40 41 50 51 60 61 62 63 \
                   $(sort $(foreach n,$(foreach m,0 1 2 3 4 5 6 7 8 9,\
                                                $m 1$m 2$m) 30 31,\
                                    -ffixed-v$n)) \
-                  -ffixed-vrsave -ffixed-vscr
+                  -ffixed-vrsave -ffixed-vscr -mno-altivec -mno-vsx
 
 ifeq ($(subdir),csu)
 sysdep_routines += hp-timing