Description:
(RW) Set global (all ports) flush request bit. The bit remains set until a
global flush request sequence completes.
+
+What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
+Date: December 2025
+KernelVersion: 6.20
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Set mode the of the syncr counter.
+ mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests
+ mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K
+ data by writing a value 13 to the COUNT[11:7] field.
+
+What: /sys/bus/coresight/devices/<tpda-name>/syncr_count
+Date: December 2025
+KernelVersion: 6.20
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Set value the of the syncr counter.
+ Range: 0-4095
*/
if (drvdata->trig_flag_ts)
writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
+
+ /* Initialize with a value of 0 */
+ val = 0;
+ if (drvdata->syncr_mode)
+ val |= TPDA_SYNCR_MODE_CTRL_MASK;
+
+ if (drvdata->syncr_count > 0 &&
+ drvdata->syncr_count < TPDA_SYNCR_COUNT_MASK)
+ val |= drvdata->syncr_count;
+ else
+ /* Program the count to its MAX value by default */
+ val |= TPDA_SYNCR_COUNT_MASK;
+
+ writel_relaxed(val, drvdata->base + TPDA_SYNCR);
}
static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
}
static DEVICE_ATTR_RW(global_flush_req);
+static ssize_t syncr_mode_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val, syncr_val;
+
+ if (!drvdata->csdev->refcnt)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR);
+ val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val);
+
+ return sysfs_emit(buf, "%lu\n", val);
+}
+
+static ssize_t syncr_mode_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ /* set the mode when first enabling the device */
+ drvdata->syncr_mode = !!val;
+
+ return size;
+}
+static DEVICE_ATTR_RW(syncr_mode);
+
+static ssize_t syncr_count_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (!drvdata->csdev->refcnt)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ val = readl_relaxed(drvdata->base + TPDA_SYNCR);
+ val &= TPDA_SYNCR_COUNT_MASK;
+
+ return sysfs_emit(buf, "%lu\n", val);
+}
+
+static ssize_t syncr_count_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ if (val > TPDA_SYNCR_COUNT_MASK)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ drvdata->syncr_count = val;
+
+ return size;
+}
+static DEVICE_ATTR_RW(syncr_count);
+
static struct attribute *tpda_attrs[] = {
&dev_attr_global_flush_req.attr,
+ &dev_attr_syncr_mode.attr,
+ &dev_attr_syncr_count.attr,
tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
#define TPDA_CR (0x000)
#define TPDA_Pn_CR(n) (0x004 + (n * 4))
#define TPDA_FPID_CR (0x084)
+#define TPDA_SYNCR (0x08C)
/* Cross trigger global (all ports) flush request bit */
#define TPDA_CR_FLREQ BIT(0)
/* Aggregator port DSB data set element size bit */
#define TPDA_Pn_CR_DSBSIZE BIT(8)
+/* TPDA_SYNCR count mask */
+#define TPDA_SYNCR_COUNT_MASK GENMASK(11, 0)
+/* TPDA_SYNCR mode control bit */
+#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12)
+
#define TPDA_MAX_INPORTS 32
/**
* @trig_freq: Enable/disable cross trigger FREQ packet request interface.
* @freq_ts: Enable/disable the timestamp for all FREQ packets.
* @cmbchan_mode: Configure the CMB/MCMB channel mode.
+ * @syncr_mode: Setting the mode for counting packets.
+ * @syncr_count: Setting the value of the count.
*/
struct tpda_drvdata {
void __iomem *base;
bool trig_freq;
bool freq_ts;
bool cmbchan_mode;
+ bool syncr_mode;
+ u32 syncr_count;
};
/* Enumerate members of global control register(cr) */