+2020-07-27 Andrew Stubbs <ams@codesourcery.com>
+
+ * dwarf2cfi.cc (get_cfa_from_loc_descr): Support register spans
+ with DW_OP_piece and DW_OP_LLVM_piece_end.
+ * dwarf2out.cc (build_cfa_loc): Support register spans.
+
2020-08-19 Sandra Loosemore <sandra@codesourcery.com>
Add a "combined" flag for "acc kernels loop" etc directives.
cfa->indirect = 0;
cfa->reg.set_by_dwreg (INVALID_REGNUM);
+ /* Record previous register pieces here. */
+ struct cfa_reg span;
+ span.set_by_dwreg (INVALID_REGNUM);
+
for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next)
{
enum dwarf_location_atom op = ptr->dw_loc_opc;
= (op == DW_OP_bregx
? ptr->dw_loc_oprnd1.v.val_int : op - DW_OP_breg0);
cfa->reg.set_by_dwreg (regno);
- cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int;
+ cfa->base_offset = (DW_OP_bregx
+ ? ptr->dw_loc_oprnd2.v.val_int
+ : ptr->dw_loc_oprnd1.v.val_int);
}
else
{
cfa->offset = 0;
}
break;
+ case DW_OP_piece:
+ if (span.reg != INVALID_REGNUM)
+ {
+ /* We only support contiguous pieces, for now. */
+ gcc_assert (cfa->reg.reg == span.reg + span.span);
+ gcc_assert (known_eq (ptr->dw_loc_oprnd1.v.val_int,
+ span.span_width));
+ span.span++;
+ cfa->reg = span;
+ }
+ else
+ {
+ cfa->reg.span_width = ptr->dw_loc_oprnd1.v.val_int;
+ span = cfa->reg;
+ }
+ break;
+ case DW_OP_LLVM_piece_end:
+ break;
case DW_OP_deref:
cfa->indirect = 1;
break;
/* The offset is already in place. */
break;
case DW_OP_plus_uconst:
+ gcc_assert (known_eq (cfa->offset, 0));
cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned;
break;
default:
head = build_span_loc (cfa->reg);
if (maybe_ne (offset, 0))
+ {
+ add_loc_descr (&head, new_loc_descr (DW_OP_LLVM_piece_end, 0, 0));
+ add_loc_descr (&head, new_loc_descr (DW_OP_deref, 0, 0));
loc_descr_plus_const (&head, offset);
+ }
}
else if (cfa->indirect)
{
+2020-07-27 Andrew Stubbs <ams@codesourcery.com>
+
+ * dwarf2.def (DW_OP_LLVM_piece_end): New extension operator.
+
2018-10-04 Cesar Philippidis <cesar@codesourcery.com>
Julian Brown <julian@codesourcery.com>
to 0 except explicitly documented for one action. Please refer AArch64 DWARF
ABI documentation for details. */
DW_OP (DW_OP_AARCH64_operation, 0xea)
+
+/* AMD GCN extensions (originally for LLVM). See
+ http://llvm.org/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.html */
+// This clashes with DW_OP_AARCH64_operation, so use an alias instead
+// DW_OP (DW_OP_LLVM_piece_end, 0xea)
+#define DW_OP_LLVM_piece_end DW_OP_AARCH64_operation
DW_END_OP
DW_FIRST_ATE (DW_ATE_void, 0x0)