]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
realtek: ethernet/dsa: Reduce mach include dependency 21263/head
authorMarkus Stockhausen <markus.stockhausen@gmx.de>
Tue, 23 Dec 2025 21:35:49 +0000 (22:35 +0100)
committerRobert Marko <robimarko@gmail.com>
Mon, 29 Dec 2025 10:11:29 +0000 (11:11 +0100)
The ethernet and dsa drivers still rely on several defines from
the central mach include. Move important defines over to the
driver specific includes as a first decoupling step.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21263
Signed-off-by: Robert Marko <robimarko@gmail.com>
target/linux/realtek/files-6.12/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h
target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h

index 364b66b73a2004863230b44c50b70259c9adab7b..0a983995915af40ee9b18f59a4a6763bfbc4df75 100644 (file)
 #define RTL93XX_MODEL_NAME_INFO                (0x0004)
 #define RTL93XX_CHIP_INFO              (0x0008)
 
-#define RTL838X_LED_GLB_CTRL           (0xA000)
-#define RTL839X_LED_GLB_CTRL           (0x00E4)
-#define RTL930X_LED_GLB_CTRL           (0xCC00)
-#define RTL931X_LED_GLB_CTRL           (0x0600)
-
 #define RTL838X_INT_RW_CTRL            (0x0058)
 #define RTL838X_EXT_VERSION            (0x00D0)
-#define RTL838X_PLL_CML_CTRL           (0x0FF8)
-
-/*
- * Reset
- */
-#define RTL838X_RST_GLB_CTRL_0         (0x003c)
-#define RTL838X_RST_GLB_CTRL_1         (0x0040)
-#define RTL839X_RST_GLB_CTRL           (0x0014)
-#define RTL930X_RST_GLB_CTRL_0         (0x000c)
-#define RTL931X_RST_GLB_CTRL           (0x0400)
-
-/* LED control by switch */
-#define RTL838X_LED_MODE_SEL           (0x1004)
-#define RTL838X_LED_MODE_CTRL          (0xA004)
-#define RTL838X_LED_P_EN_CTRL          (0xA008)
-
-/* LED control by software */
-#define RTL838X_LED_SW_CTRL            (0xA00C)
-#define RTL839X_LED_SW_CTRL            (0xA00C)
-#define RTL838X_LED_SW_P_EN_CTRL       (0xA010)
-#define RTL839X_LED_SW_P_EN_CTRL       (0x012C)
-#define RTL838X_LED0_SW_P_EN_CTRL      (0xA010)
-#define RTL839X_LED0_SW_P_EN_CTRL      (0x012C)
-#define RTL838X_LED1_SW_P_EN_CTRL      (0xA014)
-#define RTL839X_LED1_SW_P_EN_CTRL      (0x0130)
-#define RTL838X_LED2_SW_P_EN_CTRL      (0xA018)
-#define RTL839X_LED2_SW_P_EN_CTRL      (0x0134)
-#define RTL838X_LED_SW_P_CTRL          (0xA01C)
-#define RTL838X_LED_SW_P_CTRL_PORT(p)  (RTL838X_LED_SW_P_CTRL + (((p) << 2)))
-#define RTL839X_LED_SW_P_CTRL          (0x0144)
-
-#define RTL839X_MAC_EFUSE_CTRL         (0x02ac)
-
-/*
- * MDIO via Realtek's SMI interface
- */
-#define RTL838X_SMI_GLB_CTRL           (0xa100)
-#define RTL838X_SMI_POLL_CTRL          (0xa17c)
-
-#define RTL839X_SMI_GLB_CTRL           (0x03f8)
-#define RTL839X_SMI_PORT_POLLING_CTRL  (0x03fc)
-
-#define RTL930X_SMI_POLL_CTRL          (0xca90)
-#define RTL931X_SMI_PORT_POLLING_CTRL  (0x0CCC)
-
-/* Switch interrupts */
-#define RTL838X_IMR_GLB                        (0x1100)
-#define RTL838X_IMR_PORT_LINK_STS_CHG  (0x1104)
-#define RTL838X_ISR_GLB_SRC            (0x1148)
-#define RTL838X_ISR_PORT_LINK_STS_CHG  (0x114C)
-
-#define RTL839X_IMR_GLB                        (0x0064)
-#define RTL839X_IMR_PORT_LINK_STS_CHG  (0x0068)
-#define RTL839X_ISR_GLB_SRC            (0x009c)
-#define RTL839X_ISR_PORT_LINK_STS_CHG  (0x00a0)
-
-#define RTL930X_IMR_GLB                        (0xC628)
-#define RTL930X_IMR_PORT_LINK_STS_CHG  (0xC62C)
-#define RTL930X_ISR_GLB                        (0xC658)
-#define RTL930X_ISR_PORT_LINK_STS_CHG  (0xC660)
-
-/* IMR_GLB does not exit on RTL931X */
-#define RTL931X_IMR_PORT_LINK_STS_CHG  (0x126C)
-#define RTL931X_ISR_GLB_SRC            (0x12B4)
-#define RTL931X_ISR_PORT_LINK_STS_CHG  (0x12B8)
 
 /* Definition of family IDs */
 #define RTL8380_FAMILY_ID              (0x8380)
index 95ccfba639d2957000cd210852823e802d41363e..4d1283cd6a7862af3578d937f3ff42d5614daa49 100644 (file)
 #define RTL930X_INGRESS_FC_CTRL(port)          (0x81CC + ((port / 29) * 4))
 #define RTL930X_INGRESS_FC_CTRL_EN(port)       BIT(port % 29)
 
+/* Switch interrupts */
+#define RTL838X_IMR_GLB                                (0x1100)
+#define RTL838X_IMR_PORT_LINK_STS_CHG          (0x1104)
+#define RTL838X_ISR_GLB_SRC                    (0x1148)
+#define RTL838X_ISR_PORT_LINK_STS_CHG          (0x114C)
+
+#define RTL839X_IMR_GLB                                (0x0064)
+#define RTL839X_IMR_PORT_LINK_STS_CHG          (0x0068)
+#define RTL839X_ISR_GLB_SRC                    (0x009c)
+#define RTL839X_ISR_PORT_LINK_STS_CHG          (0x00a0)
+
+#define RTL930X_IMR_GLB                                (0xC628)
+#define RTL930X_IMR_PORT_LINK_STS_CHG          (0xC62C)
+#define RTL930X_ISR_GLB                                (0xC658)
+#define RTL930X_ISR_PORT_LINK_STS_CHG          (0xC660)
+
+/* IMR_GLB does not exit on RTL931X */
+#define RTL931X_IMR_PORT_LINK_STS_CHG          (0x126C)
+#define RTL931X_ISR_GLB_SRC                    (0x12B4)
+#define RTL931X_ISR_PORT_LINK_STS_CHG          (0x12B8)
+
+/*
+ * MDIO via Realtek's SMI interface
+ */
+#define RTL838X_SMI_GLB_CTRL                   (0xa100)
+#define RTL838X_SMI_POLL_CTRL                  (0xa17c)
+
+#define RTL839X_SMI_GLB_CTRL                   (0x03f8)
+#define RTL839X_SMI_PORT_POLLING_CTRL          (0x03fc)
+
+#define RTL930X_SMI_POLL_CTRL                  (0xca90)
+#define RTL931X_SMI_PORT_POLLING_CTRL          (0x0CCC)
+
+#define RTL838X_LED_GLB_CTRL                   (0xA000)
+#define RTL839X_LED_GLB_CTRL                   (0x00E4)
+#define RTL930X_LED_GLB_CTRL                   (0xCC00)
+#define RTL931X_LED_GLB_CTRL                   (0x0600)
+
+/* LED control by switch */
+#define RTL838X_LED_MODE_SEL                   (0x1004)
+#define RTL838X_LED_MODE_CTRL                  (0xA004)
+#define RTL838X_LED_P_EN_CTRL                  (0xA008)
+
+/* LED control by software */
+#define RTL838X_LED_SW_CTRL                    (0xA00C)
+#define RTL838X_LED0_SW_P_EN_CTRL              (0xA010)
+#define RTL838X_LED1_SW_P_EN_CTRL              (0xA014)
+#define RTL838X_LED2_SW_P_EN_CTRL              (0xA018)
+#define RTL838X_LED_SW_P_CTRL                  (0xA01C)
+#define RTL838X_LED_SW_P_CTRL_PORT(p)          (RTL838X_LED_SW_P_CTRL + (((p) << 2)))
+
+
 /* special port action controls */
 /* values:
  *      0 = FORWARD (default)
index 835bd742b40c0db3a1966dfbe8b3ccfbc5256192..eceb6960b67ec7471bd6ca7343f4836fd06be761 100644 (file)
@@ -5,6 +5,18 @@
 
 /* Register definition */
 
+/*
+ * Reset
+ */
+#define RTL838X_RST_GLB_CTRL_0                 (0x003c)
+#define RTL839X_RST_GLB_CTRL                   (0x0014)
+#define RTL930X_RST_GLB_CTRL_0                 (0x000c)
+#define RTL931X_RST_GLB_CTRL                   (0x0400)
+
+/* Switch interrupts */
+#define RTL839X_IMR_PORT_LINK_STS_CHG          (0x0068)
+#define RTL839X_ISR_PORT_LINK_STS_CHG          (0x00a0)
+
 /* Per port MAC control */
 #define RTL838X_MAC_PORT_CTRL                  (0xd560)
 #define RTL839X_MAC_PORT_CTRL                  (0x8004)