]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amd/display: incorrect conditions for failing dto calculations
authorClay King <clayking@amd.com>
Wed, 20 Aug 2025 19:04:29 +0000 (15:04 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 13 Nov 2025 20:34:16 +0000 (15:34 -0500)
[ Upstream commit 306cbcc6f687d791ab3cc8fbbe30f5286fd0d1e5 ]

[Why & How]
Previously, when calculating dto phase, we would incorrectly fail when phase
<=0 without additionally checking for the integer value. This meant that
calculations would incorrectly fail when the desired pixel clock was an exact
multiple of the reference clock.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Clay King <clayking@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

index 62402c7be0a5ea26313b964f2b4d2931d35d94c9..8cdc7ad1045493bd2fea48f64ff189b2b16410b5 100644 (file)
@@ -619,7 +619,7 @@ static void dccg401_set_dp_dto(
                dto_integer = div_u64(params->pixclk_hz, dto_modulo_hz);
                dto_phase_hz = params->pixclk_hz - dto_integer * dto_modulo_hz;
 
-               if (dto_phase_hz <= 0) {
+               if (dto_phase_hz <= 0 && dto_integer <= 0) {
                        /* negative pixel rate should never happen */
                        BREAK_TO_DEBUGGER();
                        return;