&& rtx_equal_p (XEXP (op0, 1), op1))))
return op2;
+ /* Convert a != 0 ? -a : 0 into "-a". */
+ if (GET_CODE (op0) == NE
+ && ! side_effects_p (op0)
+ && ! HONOR_NANS (mode)
+ && ! HONOR_SIGNED_ZEROS (mode)
+ && XEXP (op0, 1) == CONST0_RTX (mode)
+ && op2 == CONST0_RTX (mode)
+ && GET_CODE (op1) == NEG
+ && rtx_equal_p (XEXP (op0, 0), XEXP (op1, 0)))
+ return op1;
+
+ /* Convert a == 0 ? 0 : -a into "-a". */
+ if (GET_CODE (op0) == EQ
+ && ! side_effects_p (op0)
+ && ! HONOR_NANS (mode)
+ && ! HONOR_SIGNED_ZEROS (mode)
+ && op1 == CONST0_RTX (mode)
+ && XEXP (op0, 1) == CONST0_RTX (mode)
+ && GET_CODE (op2) == NEG
+ && rtx_equal_p (XEXP (op0, 0), XEXP (op2, 0)))
+ return op2;
+
/* Convert (!c) != {0,...,0} ? a : b into
c != {0,...,0} ? b : a for vector modes. */
if (VECTOR_MODE_P (GET_MODE (op1))
--- /dev/null
+/* { dg-do compile } */
+/* Disable phiopt as that will optimize away the `?:`,
+ want to test simplify-rtx */
+/* { dg-options "-O2 -fno-ssa-phiopt" } */
+
+/* PR rtl-optimization/58195 */
+
+int a2(int input)
+{
+ if (input == 0)
+ return 0;
+ return -input;
+}
+int a1(int input)
+{
+ int t = -input;
+ return input == 0 ? 0 : t;
+}
+
+int a(int input)
+{
+ int value = 0;
+ for(int n = input; n != 0; ++n)
+ ++value;
+ return value;
+}
+
+/* There should be no comparison against 0 here, */
+/* { dg-final { scan-assembler-not "cmp\t" } } */
+/* { dg-final { scan-assembler "\tneg\t" } } */
+
--- /dev/null
+/* { dg-do compile } */
+/* Disable phiopt as that will optimize away the `?:`,
+ want to test simplify-rtx */
+/* { dg-options "-O2 -ffast-math -fno-ssa-phiopt" } */
+
+/* PR rtl-optimization/58195 */
+
+float a2(float input)
+{
+ if (input == 0)
+ return 0;
+ return -input;
+}
+
+/* There should be no comparison against 0 here, */
+/* { dg-final { scan-assembler-not "\tfcmp\t" } } */
+/* { dg-final { scan-assembler-not "\tfcsel\t" } } */
+/* { dg-final { scan-assembler "\tfneg\t" } } */
+