arm64: dts: qcom: sm8150: Use the header with DSI phy clock IDs

Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-19-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
index 9ac9854b35fd157e0735aaff4e0bdbaa8946e0d5..e1e294f0f462ac824bffe96615b36ddcd8996d80 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
@@ -500,7 +500,8 @@
        qcom,dual-dsi-mode;
 
        /* DSI1 is slave, so use DSI0 clocks */
-       assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
+       assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
        status = "okay";
 

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 4dbda54b47a54d1fa9c3fbeb441f8bc852e52f75..2aca3fdae47ceef9b3030613ec2b8f3a6c1a3356 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
 #include <dt-bindings/clock/qcom,videocc-sm8150.h>
@@ -3981,8 +3982,8 @@
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
                                                  <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi0_phy 0>,
-                                                        <&mdss_dsi0_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
                                operating-points-v2 = <&dsi_opp_table>;
                                power-domains = <&rpmhpd SM8150_MMCX>;
@@ -4074,8 +4075,8 @@
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
                                                  <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi1_phy 0>,
-                                                        <&mdss_dsi1_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
 
                                operating-points-v2 = <&dsi_opp_table>;
                                power-domains = <&rpmhpd SM8150_MMCX>;
@@ -4130,10 +4131,10 @@
                        compatible = "qcom,sm8150-dispcc";
                        reg = <0 0x0af00000 0 0x10000>;
                        clocks = <&rpmhcc RPMH_CXO_CLK>,
-                                <&mdss_dsi0_phy 0>,
-                                <&mdss_dsi0_phy 1>,
-                                <&mdss_dsi1_phy 0>,
-                                <&mdss_dsi1_phy 1>,
+                                <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
                                 <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
                                 <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
                        clock-names = "bi_tcxo",