PPC64: Add build infrastructure.

diff --git a/src/Makefile b/src/Makefile
index 71ab6ea0910fadbab9ba209bd93f93aba241b5f6..d7539fd5643670a6a10d1152bfeed37a7093229b 100644 (file)
--- a/src/Makefile
+++ b/src/Makefile
@@ -421,12 +421,15 @@ ifeq (ppc,$(TARGET_LJARCH))
   ifneq (,$(findstring LJ_ARCH_ROUND 1,$(TARGET_TESTARCH)))
     DASM_AFLAGS+= -D ROUND
   endif
-  ifneq (,$(findstring LJ_ARCH_PPC64 1,$(TARGET_TESTARCH)))
+  ifneq (,$(findstring LJ_ARCH_PPC32ON64 1,$(TARGET_TESTARCH)))
     DASM_AFLAGS+= -D GPR64
   endif
   ifeq (PS3,$(TARGET_SYS))
     DASM_AFLAGS+= -D PPE -D TOC
   endif
+  ifneq (,$(findstring LJ_ARCH_PPC64 ,$(TARGET_TESTARCH)))
+    DASM_ARCH= ppc64
+  endif
 endif
 endif
 endif

diff --git a/src/host/buildvm.c b/src/host/buildvm.c
index c3e7dad2594e7a515f04dd28ddd95a317362602f..324dd263e5756e8dda06087889689192c883db10 100644 (file)
--- a/src/host/buildvm.c
+++ b/src/host/buildvm.c
@@ -114,7 +114,7 @@ static const char *sym_decorate(BuildCtx *ctx,
     else
       *p = '\0';
 #elif LJ_TARGET_PPC && !LJ_TARGET_CONSOLE
-    /* Keep @plt. */
+    /* Keep @plt etc. */
 #else
     *p = '\0';
 #endif

diff --git a/src/host/buildvm_asm.c b/src/host/buildvm_asm.c
index fe1b589a983ff136dd12ce214b0c76684f3ba001..9b7ae53a26afe2bedb4b6081e243a8a3422caea4 100644 (file)
--- a/src/host/buildvm_asm.c
+++ b/src/host/buildvm_asm.c
@@ -140,6 +140,14 @@ static void emit_asm_wordreloc(BuildCtx *ctx, uint8_t *p, int n,
     fprintf(ctx->fp, "\t%s %d, %d, " TOCPREFIX "%s\n",
            (ins & 1) ? "bcl" : "bc", (ins >> 21) & 31, (ins >> 16) & 31, sym);
   } else if ((ins >> 26) == 18) {
+#if LJ_ARCH_PPC64
+    const char *suffix = strchr(sym, '@');
+    if (suffix && suffix[1] == 'h') {
+      fprintf(ctx->fp, "\taddis 11, 2, %s\n", sym);
+    } else if (suffix && suffix[1] == 'l') {
+      fprintf(ctx->fp, "\tld 12, %s\n", sym);
+    } else
+#endif
     fprintf(ctx->fp, "\t%s " TOCPREFIX "%s\n", (ins & 1) ? "bl" : "b", sym);
   } else {
     fprintf(stderr,
@@ -237,6 +245,9 @@ void emit_asm(BuildCtx *ctx)
   int i, rel;
 
   fprintf(ctx->fp, "\t.file \"buildvm_%s.dasc\"\n", ctx->dasm_arch);
+#if LJ_ARCH_PPC64
+  fprintf(ctx->fp, "\t.abiversion 2\n");
+#endif
   fprintf(ctx->fp, "\t.text\n");
   emit_asm_align(ctx, 4);
 

diff --git a/src/lj_arch.h b/src/lj_arch.h
index 54d5cd22bf1c282d3b6b5d85a79119c2c4ad6438..61c7e19f3167238daa7feecfc088ff1924ce2c15 100644 (file)
--- a/src/lj_arch.h
+++ b/src/lj_arch.h
@@ -210,13 +210,24 @@
 
 #elif LUAJIT_TARGET == LUAJIT_ARCH_PPC
 
-#define LJ_ARCH_NAME           "ppc"
+#if __BYTE_ORDER__ != __ORDER_BIG_ENDIAN__
+#define LJ_ARCH_ENDIAN         LUAJIT_LE
+#else
+#define LJ_ARCH_ENDIAN         LUAJIT_BE
+#endif
+
 #if _LP64
 #define LJ_ARCH_BITS           64
+#if LJ_ARCH_ENDIAN == LUAJIT_LE
+#define LJ_ARCH_NAME           "ppc64le"
+#else
+#define LJ_ARCH_NAME           "ppc64"
+#endif
 #else
 #define LJ_ARCH_BITS           32
+#define LJ_ARCH_NAME           "ppc"
 #endif
-#define LJ_ARCH_ENDIAN         LUAJIT_BE
+
 #define LJ_TARGET_PPC          1
 #define LJ_TARGET_EHRETREG     3
 #define LJ_TARGET_JUMPRANGE    25      /* +-2^25 = +-32MB */
@@ -225,6 +236,15 @@
 #define LJ_TARGET_UNIFYROT     1       /* Want only IR_BROL. */
 #define LJ_ARCH_NUMMODE                LJ_NUMMODE_DUAL_SINGLE
 
+#if LJ_TARGET_CONSOLE
+#define LJ_ARCH_PPC32ON64      1
+#define LJ_ARCH_NOFFI          1
+#elif LJ_ARCH_BITS == 64
+#define LJ_ARCH_PPC64          1
+#define LJ_TARGET_GC64         1
+#define LJ_ARCH_NOJIT          1       /* NYI */
+#endif
+
 #if _ARCH_PWR7
 #define LJ_ARCH_VERSION                70
 #elif _ARCH_PWR6
@@ -238,10 +258,6 @@
 #else
 #define LJ_ARCH_VERSION                0
 #endif
-#if __PPC64__ || __powerpc64__ || LJ_TARGET_CONSOLE
-#define LJ_ARCH_PPC64          1
-#define LJ_ARCH_NOFFI          1
-#endif
 #if _ARCH_PPCSQ
 #define LJ_ARCH_SQRT           1
 #endif
@@ -345,11 +361,11 @@
 #if defined(_SOFT_FLOAT) || defined(_SOFT_DOUBLE)
 #error "No support for PowerPC CPUs without double-precision FPU"
 #endif
-#if defined(_LITTLE_ENDIAN)
-#error "No support for little-endian PowerPC"
+#if !LJ_ARCH_PPC64 && LJ_ARCH_ENDIAN == LUAJIT_LE
+#error "No support for little-endian PPC32"
 #endif
-#if defined(_LP64)
-#error "No support for PowerPC 64 bit mode"
+#if LJ_ARCH_PPC64
+#error "No support for PowerPC 64 bit mode (yet)"
 #endif
 #ifdef __NO_FPRS__
 #error "No support for PPC/e500 anymore (use LuaJIT 2.0)"

diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h
index 221e221a012b4808721fa99cdd1a53f1ffdca14e..7deeb66e51f2bd40b6a3e9f1ebc9ca64ac859903 100644 (file)
--- a/src/lj_asm_ppc.h
+++ b/src/lj_asm_ppc.h
@@ -323,8 +323,10 @@ static void asm_setupresult(ASMState *as, IRIns *ir, const CCallInfo *ci)
       } else {
        ra_destreg(as, ir, RID_FPRET);
       }
+#if LJ_32
     } else if (hiop) {
       ra_destpair(as, ir);
+#endif
     } else {
       ra_destreg(as, ir, RID_RET);
     }
@@ -343,7 +345,7 @@ static void asm_callx(ASMState *as, IRIns *ir)
   func = ir->op2; irf = IR(func);
   if (irf->o == IR_CARG) { func = irf->op1; irf = IR(func); }
   if (irref_isk(func)) {  /* Call to constant address. */
-    ci.func = (ASMFunction)(void *)(irf->i);
+    ci.func = (ASMFunction)(void *)(intptr_t)(irf->i);
   } else {  /* Need a non-argument register for indirect calls. */
     RegSet allow = RSET_GPR & ~RSET_RANGE(RID_R0, REGARG_LASTGPR+1);
     Reg freg = ra_alloc1(as, func, allow);
@@ -527,7 +529,7 @@ static void asm_tvptr(ASMState *as, Reg dest, IRRef ref)
     /* Otherwise use g->tmptv to hold the TValue. */
     RegSet allow = rset_exclude(RSET_GPR, dest);
     Reg type;
-    emit_tai(as, PPCI_ADDI, dest, RID_JGL, offsetof(global_State, tmptv)-32768);
+    emit_tai(as, PPCI_ADDI, dest, RID_JGL, (int32_t)offsetof(global_State, tmptv)-32768);
     if (!irt_ispri(ir->t)) {
       Reg src = ra_alloc1(as, ref, allow);
       emit_setgl(as, src, tmptv.gcr);

diff --git a/src/lj_frame.h b/src/lj_frame.h
index 8fe48db18c3326ddd51bf66eccf01c3af690b08f..b9595a5aaa7907d7e385cd5edf25e379f9bd8224 100644 (file)
--- a/src/lj_frame.h
+++ b/src/lj_frame.h
@@ -178,7 +178,7 @@ enum { LJ_CONT_TAILCALL, LJ_CONT_FFI_CALLBACK };  /* Special continuations. */
 #define CFRAME_OFS_MULTRES     408
 #define CFRAME_SIZE            384
 #define CFRAME_SHIFT_MULTRES   3
-#elif LJ_ARCH_PPC64
+#elif LJ_ARCH_PPC32ON64
 #define CFRAME_OFS_ERRF                472
 #define CFRAME_OFS_NRES                468
 #define CFRAME_OFS_PREV                448

diff --git a/src/lj_target_ppc.h b/src/lj_target_ppc.h
index 2caeeb044c7c73f9f5c0404310b0268288465269..99867688b7d3b208d49c5d2f75f4c2937fdb9bb3 100644 (file)
--- a/src/lj_target_ppc.h
+++ b/src/lj_target_ppc.h
@@ -104,7 +104,7 @@ enum {
 /* This definition must match with the *.dasc file(s). */
 typedef struct {
   lua_Number fpr[RID_NUM_FPR]; /* Floating-point registers. */
-  int32_t gpr[RID_NUM_GPR];    /* General-purpose registers. */
+  intptr_t gpr[RID_NUM_GPR];   /* General-purpose registers. */
   int32_t spill[256];          /* Spill slots. */
 } ExitState;
 

diff --git a/src/vm_ppc.dasc b/src/vm_ppc.dasc
index df60a3be9ccaf3617d87873843c5c9e9ec9bda95..2a7a745548573c3ae285ced5ea60594ca19a7f5f 100644 (file)
--- a/src/vm_ppc.dasc
+++ b/src/vm_ppc.dasc
@@ -1,4 +1,4 @@
-|// Low-level VM code for PowerPC CPUs.
+|// Low-level VM code for PowerPC 32 bit or 32on64 bit mode.
 |// Bytecode interpreter, fast functions and helper functions.
 |// Copyright (C) 2005-2015 Mike Pall. See Copyright Notice in luajit.h
 |
@@ -18,7 +18,7 @@
 |// DynASM defines used by the PPC port:
 |//
 |// P64     64 bit pointers (only for GPR64 testing).
-|//         Note: a full PPC64 _LP64 port is not planned.
+|//         Note: see vm_ppc64.dasc for a full PPC64 _LP64 port.
 |// GPR64   64 bit registers (but possibly 32 bit pointers, e.g. PS3).
 |//         Affects reg saves, stack layout, carry/overflow/dot flags etc.
 |// FRAME32 Use 32 bit frame layout, even with GPR64 (Xbox 360).