]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amdgpu: Add guest driver CUID support
authorchong li <chongli2@amd.com>
Wed, 6 May 2026 09:21:23 +0000 (17:21 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 18 May 2026 22:13:28 +0000 (18:13 -0400)
v3:
improve the coding style.

v2:
use debugfs_create_x64 and debugfs_create_x8 to create node.

v1:
1. Add guest driver CUID support
2. Do not expose vf index(variable "fcn_idx") to customers,
   replace the fcn_idx with pad.
   Only expose the unitid to customers.

background:
Change fcn_idx to pad, VF index won't expose to guest vm.
Introduce a new unitid field as the VF identifier to replace the VF index:
 1).unitid is assigned by the host driver
 2).It is delivered to the guest via the pf2vf message
 3).The application or umd can retrieve united from the sysfs node

Signed-off-by: chong li <chongli2@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h

index 76808f281bc030966ef9c231e9cd18d3381d834f..5d7bfa59424a4f5fc1a8c42c2c81b7bc9188da28 100644 (file)
@@ -1074,6 +1074,7 @@ struct amdgpu_device {
        long                            psp_timeout;
 
        uint64_t                        unique_id;
+       uint8_t                         unitid;
        uint64_t        df_perfmon_config_assign_mask[AMDGPU_MAX_DF_PERFMONS];
 
        /* enable runtime pm on the device */
index b951b42d66bda2316a32a4b97995139f3d046773..389bad7242731188ea05b2df4685636914299b3f 100644 (file)
@@ -2126,6 +2126,9 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
        debugfs_create_x32("amdgpu_smu_debug", 0600, root,
                           &adev->pm.smu_debug_mask);
 
+       debugfs_create_x64("unique_id", 0444, root, &adev->unique_id);
+       debugfs_create_x8("unitid", 0444, root, &adev->unitid);
+
        ent = debugfs_create_file("amdgpu_preempt_ib", 0600, root, adev,
                                  &fops_ib_preempt);
        if (IS_ERR(ent)) {
index e8d180a412d166fd80d2a505e6e581603e01ab86..3fcbd722ee3b447f6705b145d535d791b24809a1 100644 (file)
@@ -463,6 +463,9 @@ static void amdgpu_virt_add_bad_page(struct amdgpu_device *adev,
 static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)
 {
        struct amd_sriov_msg_pf2vf_info_header *pf2vf_info = adev->virt.fw_reserve.p_pf2vf;
+       struct amdgim_pf2vf_info_v1 *pf2vf_v1;
+       struct amd_sriov_msg_pf2vf_info *pf2vf;
+
        uint32_t checksum;
        uint32_t checkval;
 
@@ -479,7 +482,8 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)
 
        switch (pf2vf_info->version) {
        case 1:
-               checksum = ((struct amdgim_pf2vf_info_v1 *)pf2vf_info)->checksum;
+               pf2vf_v1 = (struct amdgim_pf2vf_info_v1 *)pf2vf_info;
+               checksum = pf2vf_v1->checksum;
                checkval = amd_sriov_msg_checksum(
                        adev->virt.fw_reserve.p_pf2vf, pf2vf_info->size,
                        adev->virt.fw_reserve.checksum_key, checksum);
@@ -490,12 +494,12 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)
                        return -EINVAL;
                }
 
-               adev->virt.gim_feature =
-                       ((struct amdgim_pf2vf_info_v1 *)pf2vf_info)->feature_flags;
+               adev->virt.gim_feature = pf2vf_v1->feature_flags;
                break;
        case 2:
                /* TODO: missing key, need to add it later */
-               checksum = ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->checksum;
+               pf2vf = (struct amd_sriov_msg_pf2vf_info *)pf2vf_info;
+               checksum = pf2vf->checksum;
                checkval = amd_sriov_msg_checksum(
                        adev->virt.fw_reserve.p_pf2vf, pf2vf_info->size,
                        0, checksum);
@@ -507,11 +511,9 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)
                }
 
                adev->virt.vf2pf_update_interval_ms =
-                       ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->vf2pf_update_interval_ms;
-               adev->virt.gim_feature =
-                       ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->feature_flags.all;
-               adev->virt.reg_access =
-                       ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->reg_access_flags.all;
+                       pf2vf->vf2pf_update_interval_ms;
+               adev->virt.gim_feature = pf2vf->feature_flags.all;
+               adev->virt.reg_access = pf2vf->reg_access_flags.all;
 
                adev->virt.decode_max_dimension_pixels = 0;
                adev->virt.decode_max_frame_pixels = 0;
@@ -519,26 +521,30 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)
                adev->virt.encode_max_frame_pixels = 0;
                adev->virt.is_mm_bw_enabled = false;
                for (i = 0; i < AMD_SRIOV_MSG_RESERVE_VCN_INST; i++) {
-                       tmp = ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->mm_bw_management[i].decode_max_dimension_pixels;
+                       tmp = pf2vf->mm_bw_management[i].decode_max_dimension_pixels;
                        adev->virt.decode_max_dimension_pixels = max(tmp, adev->virt.decode_max_dimension_pixels);
 
-                       tmp = ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->mm_bw_management[i].decode_max_frame_pixels;
+                       tmp = pf2vf->mm_bw_management[i].decode_max_frame_pixels;
                        adev->virt.decode_max_frame_pixels = max(tmp, adev->virt.decode_max_frame_pixels);
 
-                       tmp = ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->mm_bw_management[i].encode_max_dimension_pixels;
+                       tmp = pf2vf->mm_bw_management[i].encode_max_dimension_pixels;
                        adev->virt.encode_max_dimension_pixels = max(tmp, adev->virt.encode_max_dimension_pixels);
 
-                       tmp = ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->mm_bw_management[i].encode_max_frame_pixels;
+                       tmp = pf2vf->mm_bw_management[i].encode_max_frame_pixels;
                        adev->virt.encode_max_frame_pixels = max(tmp, adev->virt.encode_max_frame_pixels);
                }
                if ((adev->virt.decode_max_dimension_pixels > 0) || (adev->virt.encode_max_dimension_pixels > 0))
                        adev->virt.is_mm_bw_enabled = true;
 
-               adev->unique_id =
-                       ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->uuid;
-               adev->virt.ras_en_caps.all = ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->ras_en_caps.all;
+               adev->unique_id = pf2vf->uuid;
+
+               adev->unitid = 0;
+               if (amdgpu_sriov_is_unitid_support(adev))
+                       adev->unitid = pf2vf->unitid;
+
+               adev->virt.ras_en_caps.all = pf2vf->ras_en_caps.all;
                adev->virt.ras_telemetry_en_caps.all =
-                       ((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->ras_telemetry_en_caps.all;
+                       pf2vf->ras_telemetry_en_caps.all;
                break;
        default:
                dev_err(adev->dev, "invalid pf2vf version: 0x%x\n", pf2vf_info->version);
index 9dcf0b07d513b07f472689d80704f9fb0c65611b..d80f01c0e754df462df564a5ee2bf1fa2f8df2a4 100644 (file)
@@ -295,7 +295,7 @@ struct amd_sriov_msg_pf2vf_info {
        uint32_t vf2pf_update_interval_ms;
        /* identification in ROCm SMI */
        uint64_t uuid;
-       uint32_t fcn_idx;
+       uint32_t pad;
        /* flags to indicate which register access method VF should use */
        union amd_sriov_reg_access_flags reg_access_flags;
        /* MM BW management */